Home
last modified time | relevance | path

Searched refs:RTC_CNTL_FIB_SUPER_WDT_RST (Results 1 – 9 of 9) sorted by relevance

/hal_espressif-latest/components/bootloader_support/src/esp32c2/
Dbootloader_soc.c12 REG_CLR_BIT(RTC_CNTL_FIB_SEL_REG, RTC_CNTL_FIB_SUPER_WDT_RST); in bootloader_ana_super_wdt_reset_config()
/hal_espressif-latest/components/bootloader_support/src/esp32c3/
Dbootloader_soc.c12 REG_CLR_BIT(RTC_CNTL_FIB_SEL_REG, RTC_CNTL_FIB_SUPER_WDT_RST); in bootloader_ana_super_wdt_reset_config()
/hal_espressif-latest/components/bootloader_support/src/esp32s3/
Dbootloader_soc.c12 REG_CLR_BIT(RTC_CNTL_FIB_SEL_REG, RTC_CNTL_FIB_SUPER_WDT_RST); in bootloader_ana_super_wdt_reset_config()
/hal_espressif-latest/zephyr/esp32c2/src/
Dsoc_init.c21 REG_CLR_BIT(RTC_CNTL_FIB_SEL_REG, RTC_CNTL_FIB_SUPER_WDT_RST); in ana_super_wdt_reset_config()
/hal_espressif-latest/zephyr/esp32c3/src/
Dsoc_init.c31 REG_CLR_BIT(RTC_CNTL_FIB_SEL_REG, RTC_CNTL_FIB_SUPER_WDT_RST); in ana_super_wdt_reset_config()
/hal_espressif-latest/zephyr/esp32s3/src/
Dsoc_init.c20 REG_CLR_BIT(RTC_CNTL_FIB_SEL_REG, RTC_CNTL_FIB_SUPER_WDT_RST); in ana_super_wdt_reset_config()
/hal_espressif-latest/components/soc/esp32c2/include/soc/
Drtc_cntl_reg.h1683 #define RTC_CNTL_FIB_SUPER_WDT_RST BIT(2) macro
/hal_espressif-latest/components/soc/esp32c3/include/soc/
Drtc_cntl_reg.h2357 #define RTC_CNTL_FIB_SUPER_WDT_RST BIT(2) macro
/hal_espressif-latest/components/soc/esp32s3/include/soc/
Drtc_cntl_reg.h3575 #define RTC_CNTL_FIB_SUPER_WDT_RST BIT(2) macro