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Searched refs:RESET_REASON_CPU1_SW (Results 1 – 4 of 4) sorted by relevance

/hal_espressif-latest/components/soc/esp32/include/soc/
Dreset_reasons.h48 RESET_REASON_CPU1_SW = 0x0C, // Software resets CPU 1 enumerator
/hal_espressif-latest/components/soc/esp32s3/include/soc/
Dreset_reasons.h49 RESET_REASON_CPU1_SW = 0x0C, // Software resets CPU 1 by RTC_CNTL_SW_APPCPU_RST enumerator
/hal_espressif-latest/components/esp_system/port/soc/esp32/
Dclk.c221 …|| (rst_reas[1] == RESET_REASON_CPU1_MWDT1 || rst_reas[1] == RESET_REASON_CPU1_SW || rst_reas[1] =… in esp_perip_clk_init()
/hal_espressif-latest/components/esp_system/port/soc/esp32s3/
Dclk.c226 || (rst_reas[1] == RESET_REASON_CPU1_MWDT0 || rst_reas[1] == RESET_REASON_CPU1_SW || in esp_perip_clk_init()