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Searched refs:DPORT_REG_WRITE (Results 1 – 16 of 16) sorted by relevance

/hal_espressif-latest/components/mbedtls/port/esp32s2/
Dbignum.c106 DPORT_REG_WRITE(RSA_CLEAR_INTERRUPT_REG, 1); in start_op()
111 DPORT_REG_WRITE(op_reg, 1); in start_op()
122 DPORT_REG_WRITE(RSA_CLEAR_INTERRUPT_REG, 1); in wait_op_complete()
140 DPORT_REG_WRITE(RSA_LENGTH_REG, (num_words - 1)); in esp_mpi_mul_mpi_mod_hw_op()
147 DPORT_REG_WRITE(RSA_M_DASH_REG, Mprime); in esp_mpi_mul_mpi_mod_hw_op()
158 DPORT_REG_WRITE(RSA_LENGTH_REG, (num_words - 1)); in esp_mpi_exp_mpi_mod_hw_op()
165 DPORT_REG_WRITE(RSA_M_DASH_REG, Mprime); in esp_mpi_exp_mpi_mod_hw_op()
168 DPORT_REG_WRITE(RSA_CONSTANT_TIME_REG, 0); in esp_mpi_exp_mpi_mod_hw_op()
169 DPORT_REG_WRITE(RSA_SEARCH_OPEN_REG, 1); in esp_mpi_exp_mpi_mod_hw_op()
170 DPORT_REG_WRITE(RSA_SEARCH_POS_REG, y_bits - 1); in esp_mpi_exp_mpi_mod_hw_op()
[all …]
/hal_espressif-latest/components/mbedtls/port/esp32s3/
Dbignum.c108 DPORT_REG_WRITE(RSA_CLEAR_INTERRUPT_REG, 1); in start_op()
113 DPORT_REG_WRITE(op_reg, 1); in start_op()
124 DPORT_REG_WRITE(RSA_CLEAR_INTERRUPT_REG, 1); in wait_op_complete()
142 DPORT_REG_WRITE(RSA_LENGTH_REG, (num_words - 1)); in esp_mpi_mul_mpi_mod_hw_op()
149 DPORT_REG_WRITE(RSA_M_DASH_REG, Mprime); in esp_mpi_mul_mpi_mod_hw_op()
160 DPORT_REG_WRITE(RSA_LENGTH_REG, (num_words - 1)); in esp_mpi_exp_mpi_mod_hw_op()
167 DPORT_REG_WRITE(RSA_M_DASH_REG, Mprime); in esp_mpi_exp_mpi_mod_hw_op()
170 DPORT_REG_WRITE(RSA_CONSTANT_TIME_REG, 0); in esp_mpi_exp_mpi_mod_hw_op()
171 DPORT_REG_WRITE(RSA_SEARCH_OPEN_REG, 1); in esp_mpi_exp_mpi_mod_hw_op()
172 DPORT_REG_WRITE(RSA_SEARCH_POS_REG, y_bits - 1); in esp_mpi_exp_mpi_mod_hw_op()
[all …]
/hal_espressif-latest/components/mbedtls/port/esp32/
Dbignum.c56 DPORT_REG_WRITE(RSA_INTERRUPT_REG, enable); in esp_mpi_interrupt_enable()
61 DPORT_REG_WRITE(RSA_CLEAR_INTERRUPT_REG, 1); in esp_mpi_interrupt_clear()
82 DPORT_REG_WRITE(mem_base + i * 4, mpi->MBEDTLS_PRIVATE(p[i])); in mpi_to_mem_block()
87 DPORT_REG_WRITE(mem_base + i * 4, 0); in mpi_to_mem_block()
134 DPORT_REG_WRITE(RSA_INTERRUPT_REG, 1); in start_op()
139 DPORT_REG_WRITE(op_reg, 1); in start_op()
150 DPORT_REG_WRITE(RSA_INTERRUPT_REG, 1); in wait_op_complete()
167 DPORT_REG_WRITE(RSA_M_DASH_REG, (uint32_t)Mprime); in esp_mpi_mul_mpi_mod_hw_op()
170 DPORT_REG_WRITE(RSA_MULT_MODE_REG, (hw_words / 16) - 1); in esp_mpi_mul_mpi_mod_hw_op()
194 DPORT_REG_WRITE(RSA_M_DASH_REG, 0); in esp_mpi_mul_mpi_hw_op()
[all …]
/hal_espressif-latest/components/hal/esp32/include/hal/
Daes_ll.h56 DPORT_REG_WRITE(AES_KEY_BASE + i * 4, key_word); in aes_ll_write_key()
74 DPORT_REG_WRITE(AES_MODE_REG, mode_reg_base + ((key_bytes / 8) - 2)); in aes_ll_set_mode()
93 DPORT_REG_WRITE(AES_TEXT_BASE, i0); in aes_ll_write_block()
96 DPORT_REG_WRITE(AES_TEXT_BASE + 4, i1); in aes_ll_write_block()
99 DPORT_REG_WRITE(AES_TEXT_BASE + 8, i2); in aes_ll_write_block()
102 DPORT_REG_WRITE(AES_TEXT_BASE + 12, i3); in aes_ll_write_block()
125 DPORT_REG_WRITE(AES_START_REG, 1); in aes_ll_start_transform()
Dsha_ll.h71 DPORT_REG_WRITE(SHA_START_REG(sha_type), 1); in sha_ll_start_block()
81 DPORT_REG_WRITE(SHA_CONTINUE_REG(sha_type), 1); in sha_ll_continue_block()
91 DPORT_REG_WRITE(SHA_LOAD_REG(sha_type), 1); in sha_ll_load()
Dclk_tree_ll.h584 DPORT_REG_WRITE(DPORT_CPU_PER_CONF_REG, 0); in clk_ll_cpu_set_freq_mhz_from_pll()
587 DPORT_REG_WRITE(DPORT_CPU_PER_CONF_REG, 1); in clk_ll_cpu_set_freq_mhz_from_pll()
590 DPORT_REG_WRITE(DPORT_CPU_PER_CONF_REG, 2); in clk_ll_cpu_set_freq_mhz_from_pll()
/hal_espressif-latest/components/soc/esp32c6/include/soc/
Ddport_access.h37 #define DPORT_REG_WRITE(_r, _v) _DPORT_REG_WRITE((_r), (_v)) macro
46 #define DPORT_REG_SET_BIT(_r, _b) DPORT_REG_WRITE((_r), (DPORT_REG_READ(_r)|(_b)))
49 #define DPORT_REG_CLR_BIT(_r, _b) DPORT_REG_WRITE((_r), (DPORT_REG_READ(_r) & (~(_b))))
52 #define DPORT_REG_SET_BITS(_r, _b, _m) DPORT_REG_WRITE((_r), ((DPORT_REG_READ(_r) & (~(_m))) | ((_b…
58 #define DPORT_REG_SET_FIELD(_r, _f, _v) DPORT_REG_WRITE((_r), ((DPORT_REG_READ(_r) & (~((_f##_V) <<…
/hal_espressif-latest/components/soc/esp32s3/include/soc/
Ddport_access.h34 #define DPORT_REG_WRITE(_r, _v) _DPORT_REG_WRITE((_r), (_v)) macro
43 #define DPORT_REG_SET_BIT(_r, _b) DPORT_REG_WRITE((_r), (DPORT_REG_READ(_r)|(_b)))
46 #define DPORT_REG_CLR_BIT(_r, _b) DPORT_REG_WRITE((_r), (DPORT_REG_READ(_r) & (~(_b))))
49 #define DPORT_REG_SET_BITS(_r, _b, _m) DPORT_REG_WRITE((_r), ((DPORT_REG_READ(_r) & (~(_m))) | ((_b…
55 #define DPORT_REG_SET_FIELD(_r, _f, _v) DPORT_REG_WRITE((_r), ((DPORT_REG_READ(_r) & (~((_f##_V) <<…
/hal_espressif-latest/components/soc/esp32h2/include/soc/
Ddport_access.h36 #define DPORT_REG_WRITE(_r, _v) _DPORT_REG_WRITE((_r), (_v)) macro
45 #define DPORT_REG_SET_BIT(_r, _b) DPORT_REG_WRITE((_r), (DPORT_REG_READ(_r)|(_b)))
48 #define DPORT_REG_CLR_BIT(_r, _b) DPORT_REG_WRITE((_r), (DPORT_REG_READ(_r) & (~(_b))))
51 #define DPORT_REG_SET_BITS(_r, _b, _m) DPORT_REG_WRITE((_r), ((DPORT_REG_READ(_r) & (~(_m))) | ((_b…
57 #define DPORT_REG_SET_FIELD(_r, _f, _v) DPORT_REG_WRITE((_r), ((DPORT_REG_READ(_r) & (~((_f##_V) <<…
/hal_espressif-latest/components/soc/esp32c3/include/soc/
Ddport_access.h37 #define DPORT_REG_WRITE(_r, _v) _DPORT_REG_WRITE((_r), (_v)) macro
46 #define DPORT_REG_SET_BIT(_r, _b) DPORT_REG_WRITE((_r), (DPORT_REG_READ(_r)|(_b)))
49 #define DPORT_REG_CLR_BIT(_r, _b) DPORT_REG_WRITE((_r), (DPORT_REG_READ(_r) & (~(_b))))
52 #define DPORT_REG_SET_BITS(_r, _b, _m) DPORT_REG_WRITE((_r), ((DPORT_REG_READ(_r) & (~(_m))) | ((_b…
58 #define DPORT_REG_SET_FIELD(_r, _f, _v) DPORT_REG_WRITE((_r), ((DPORT_REG_READ(_r) & (~((_f##_V) <<…
/hal_espressif-latest/components/soc/esp32c2/include/soc/
Ddport_access.h37 #define DPORT_REG_WRITE(_r, _v) _DPORT_REG_WRITE((_r), (_v)) macro
46 #define DPORT_REG_SET_BIT(_r, _b) DPORT_REG_WRITE((_r), (DPORT_REG_READ(_r)|(_b)))
49 #define DPORT_REG_CLR_BIT(_r, _b) DPORT_REG_WRITE((_r), (DPORT_REG_READ(_r) & (~(_b))))
52 #define DPORT_REG_SET_BITS(_r, _b, _m) DPORT_REG_WRITE((_r), ((DPORT_REG_READ(_r) & (~(_m))) | ((_b…
58 #define DPORT_REG_SET_FIELD(_r, _f, _v) DPORT_REG_WRITE((_r), ((DPORT_REG_READ(_r) & (~((_f##_V) <<…
/hal_espressif-latest/components/soc/esp32s2/include/soc/
Ddport_access.h35 #define DPORT_REG_WRITE(_r, _v) _DPORT_REG_WRITE((_r), (_v)) macro
44 #define DPORT_REG_SET_BIT(_r, _b) DPORT_REG_WRITE((_r), (DPORT_REG_READ(_r)|(_b)))
47 #define DPORT_REG_CLR_BIT(_r, _b) DPORT_REG_WRITE((_r), (DPORT_REG_READ(_r) & (~(_b))))
50 #define DPORT_REG_SET_BITS(_r, _b, _m) DPORT_REG_WRITE((_r), ((DPORT_REG_READ(_r) & (~(_m))) | ((_b…
56 #define DPORT_REG_SET_FIELD(_r, _f, _v) DPORT_REG_WRITE((_r), ((DPORT_REG_READ(_r) & (~((_f##_V) <<…
/hal_espressif-latest/components/soc/esp32/include/soc/
Ddport_access.h51 #define DPORT_REG_WRITE(_r, _v) _DPORT_REG_WRITE((_r), (_v)) macro
137 #define DPORT_REG_SET_BIT(_r, _b) DPORT_REG_WRITE((_r), (DPORT_REG_READ(_r)|(_b)))
140 #define DPORT_REG_CLR_BIT(_r, _b) DPORT_REG_WRITE((_r), (DPORT_REG_READ(_r) & (~(_b))))
143 #define DPORT_REG_SET_BITS(_r, _b, _m) DPORT_REG_WRITE((_r), ((DPORT_REG_READ(_r) & (~(_m))) | ((_b…
149 #define DPORT_REG_SET_FIELD(_r, _f, _v) DPORT_REG_WRITE((_r), ((DPORT_REG_READ(_r) & (~((_f##_V) <<…
/hal_espressif-latest/components/esp_system/port/soc/esp32/
Dsystem_internal.c43 DPORT_REG_WRITE(DPORT_CORE_RST_EN_REG, 0); in esp_system_reset_modules_on_exit()
51 DPORT_REG_WRITE(DPORT_PERIP_RST_EN_REG, 0); in esp_system_reset_modules_on_exit()
128 DPORT_REG_WRITE(DPORT_APPCPU_CTRL_D_REG, 0); in esp_restart_noos()
/hal_espressif-latest/components/esp_system/port/soc/esp32s2/
Dsystem_internal.c45 DPORT_REG_WRITE(DPORT_CORE_RST_EN_REG, 0); in esp_system_reset_modules_on_exit()
51 DPORT_REG_WRITE(DPORT_PERIP_RST_EN_REG, 0); in esp_system_reset_modules_on_exit()
/hal_espressif-latest/components/esp_system/port/arch/xtensa/
Desp_ipc_isr.c206 DPORT_REG_WRITE(SYSTEM_CPU_INTR_FROM_CPU_3_REG, SYSTEM_CPU_INTR_FROM_CPU_3); in esp_ipc_isr_call_and_wait()
209 DPORT_REG_WRITE(SYSTEM_CPU_INTR_FROM_CPU_2_REG, SYSTEM_CPU_INTR_FROM_CPU_2); in esp_ipc_isr_call_and_wait()