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Searched refs:DPORT_REG_CLR_BIT (Results 1 – 16 of 16) sorted by relevance

/hal_espressif-latest/components/bootloader_support/src/esp32/
Dbootloader_esp32.c61 DPORT_REG_CLR_BIT(DPORT_APP_CACHE_CTRL1_REG, DPORT_APP_CACHE_MMU_IA_CLR); in bootloader_reset_mmu()
66 DPORT_REG_CLR_BIT(DPORT_PRO_CACHE_CTRL1_REG, DPORT_PRO_CACHE_MASK_DROM0); in bootloader_reset_mmu()
68 DPORT_REG_CLR_BIT(DPORT_APP_CACHE_CTRL1_REG, DPORT_APP_CACHE_MASK_DROM0); in bootloader_reset_mmu()
88 DPORT_REG_CLR_BIT(DPORT_PRO_CPU_RECORD_CTRL_REG, DPORT_PRO_CPU_RECORD_ENABLE); in wdt_reset_cpu0_info_enable()
/hal_espressif-latest/components/hal/esp32/include/hal/
Dcache_ll.h51 DPORT_REG_CLR_BIT(DPORT_PRO_CACHE_CTRL_REG, DPORT_PRO_CACHE_ENABLE); in cache_ll_l1_disable_cache()
56 DPORT_REG_CLR_BIT(DPORT_APP_CACHE_CTRL_REG, DPORT_APP_CACHE_ENABLE); in cache_ll_l1_disable_cache()
149 DPORT_REG_CLR_BIT(DPORT_PRO_CACHE_CTRL1_REG, bus_mask); in cache_ll_l1_enable_bus()
158 DPORT_REG_CLR_BIT(DPORT_APP_CACHE_CTRL1_REG, bus_mask); in cache_ll_l1_enable_bus()
Dspi_flash_encrypted_ll.h44DPORT_REG_CLR_BIT(DPORT_SLAVE_SPI_CONFIG_REG, DPORT_SLAVE_SPI_MASK_PRO | DPORT_SPI_ENCRYPT_ENABLE); in spi_flash_encrypt_ll_disable()
/hal_espressif-latest/zephyr/esp32/src/
Dsoc_init.c54 DPORT_REG_CLR_BIT(DPORT_PRO_CPU_RECORD_CTRL_REG, DPORT_PRO_CPU_RECORD_ENABLE); in wdt_reset_cpu0_info_enable()
86 DPORT_REG_CLR_BIT(DPORT_PRO_CACHE_CTRL1_REG, DPORT_PRO_CACHE_MASK_DROM0); in reset_mmu()
/hal_espressif-latest/zephyr/esp32s2/src/
Dsoc_init.c26 DPORT_REG_CLR_BIT(DPORT_PERI_RST_EN_REG, DPORT_PERI_EN_ASSIST_DEBUG); in wdt_reset_cpu0_info_enable()
/hal_espressif-latest/components/bootloader_support/src/esp32s2/
Dbootloader_esp32s2.c50 DPORT_REG_CLR_BIT(DPORT_PERI_RST_EN_REG, DPORT_PERI_EN_ASSIST_DEBUG); in wdt_reset_cpu0_info_enable()
/hal_espressif-latest/components/esp_system/port/
Dcpu_start.c177 DPORT_REG_CLR_BIT(DPORT_APP_CPU_RECORD_CTRL_REG, DPORT_APP_CPU_RECORD_ENABLE); in call_start_cpu1()
286 DPORT_REG_CLR_BIT(DPORT_APP_CACHE_CTRL1_REG, DPORT_APP_CACHE_MMU_IA_CLR); in do_multicore_settings()
/hal_espressif-latest/components/soc/esp32c6/include/soc/
Ddport_access.h49 #define DPORT_REG_CLR_BIT(_r, _b) DPORT_REG_WRITE((_r), (DPORT_REG_READ(_r) & (~(_b)))) macro
/hal_espressif-latest/components/soc/esp32s3/include/soc/
Ddport_access.h46 #define DPORT_REG_CLR_BIT(_r, _b) DPORT_REG_WRITE((_r), (DPORT_REG_READ(_r) & (~(_b)))) macro
/hal_espressif-latest/components/soc/esp32h2/include/soc/
Ddport_access.h48 #define DPORT_REG_CLR_BIT(_r, _b) DPORT_REG_WRITE((_r), (DPORT_REG_READ(_r) & (~(_b)))) macro
/hal_espressif-latest/components/soc/esp32c3/include/soc/
Ddport_access.h49 #define DPORT_REG_CLR_BIT(_r, _b) DPORT_REG_WRITE((_r), (DPORT_REG_READ(_r) & (~(_b)))) macro
/hal_espressif-latest/components/soc/esp32c2/include/soc/
Ddport_access.h49 #define DPORT_REG_CLR_BIT(_r, _b) DPORT_REG_WRITE((_r), (DPORT_REG_READ(_r) & (~(_b)))) macro
/hal_espressif-latest/components/soc/esp32s2/include/soc/
Ddport_access.h47 #define DPORT_REG_CLR_BIT(_r, _b) DPORT_REG_WRITE((_r), (DPORT_REG_READ(_r) & (~(_b)))) macro
/hal_espressif-latest/components/mbedtls/port/esp32s2/
Dbignum.c32 DPORT_REG_CLR_BIT(DPORT_RSA_PD_CTRL_REG, DPORT_RSA_MEM_PD); in esp_mpi_enable_hardware_hw_op()
/hal_espressif-latest/components/soc/esp32/include/soc/
Ddport_access.h140 #define DPORT_REG_CLR_BIT(_r, _b) DPORT_REG_WRITE((_r), (DPORT_REG_READ(_r) & (~(_b)))) macro
/hal_espressif-latest/components/mbedtls/port/esp32/
Dbignum.c36 DPORT_REG_CLR_BIT(DPORT_RSA_PD_CTRL_REG, DPORT_RSA_PD); in esp_mpi_enable_hardware_hw_op()