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Searched refs:SYSTEM_PERIP_RST_EN0_REG (Results 1 – 14 of 14) sorted by relevance

/hal_espressif-3.6.0/components/esp_system/port/soc/esp32h2/
Dsystem_internal.c96 SET_PERI_REG_MASK(SYSTEM_PERIP_RST_EN0_REG, in esp_restart_noos()
98 REG_WRITE(SYSTEM_PERIP_RST_EN0_REG, 0); in esp_restart_noos()
Dclk.c271 SET_PERI_REG_MASK(SYSTEM_PERIP_RST_EN0_REG, common_perip_clk); in esp_perip_clk_init()
/hal_espressif-3.6.0/components/esp_system/port/soc/esp32c3/
Dsystem_internal.c112 SET_PERI_REG_MASK(SYSTEM_PERIP_RST_EN0_REG, in esp_restart_noos()
114 REG_WRITE(SYSTEM_PERIP_RST_EN0_REG, 0); in esp_restart_noos()
Dclk.c284 SET_PERI_REG_MASK(SYSTEM_PERIP_RST_EN0_REG, common_perip_clk); in esp_perip_clk_init()
/hal_espressif-3.6.0/components/esp_system/port/soc/esp32s3/
Dsystem_internal.c105 SET_PERI_REG_MASK(SYSTEM_PERIP_RST_EN0_REG, in esp_restart_noos()
107 REG_WRITE(SYSTEM_PERIP_RST_EN0_REG, 0); in esp_restart_noos()
Dclk.c307 SET_PERI_REG_MASK(SYSTEM_PERIP_RST_EN0_REG, common_perip_clk); in esp_perip_clk_init()
/hal_espressif-3.6.0/components/bootloader_support/src/
Dbootloader_random_esp32c3.c29 CLEAR_PERI_REG_MASK(SYSTEM_PERIP_RST_EN0_REG, SYSTEM_APB_SARADC_RST_M); in bootloader_random_enable()
Dbootloader_random_esp32s3.c98 SET_PERI_REG_MASK(SYSTEM_PERIP_RST_EN0_REG, SYSTEM_APB_SARADC_RST); in bootloader_random_disable()
/hal_espressif-3.6.0/components/hal/esp32h2/include/hal/
Dclk_gate_ll.h171 return SYSTEM_PERIP_RST_EN0_REG; in periph_ll_get_rst_en_reg()
/hal_espressif-3.6.0/components/hal/esp32c3/include/hal/
Dclk_gate_ll.h199 return SYSTEM_PERIP_RST_EN0_REG; in periph_ll_get_rst_en_reg()
/hal_espressif-3.6.0/components/hal/esp32s3/include/hal/
Dclk_gate_ll.h245 return SYSTEM_PERIP_RST_EN0_REG; in periph_ll_get_rst_en_reg()
/hal_espressif-3.6.0/components/soc/esp32c3/include/soc/
Dsystem_reg.h340 #define SYSTEM_PERIP_RST_EN0_REG (DR_REG_SYSTEM_BASE + 0x018) macro
/hal_espressif-3.6.0/components/soc/esp32h2/include/soc/
Dclkrst_reg.h731 #define SYSTEM_PERIP_RST_EN0_REG (DR_REG_CLKRST_BASE + 0x0028) macro
/hal_espressif-3.6.0/components/soc/esp32s3/include/soc/
Dsystem_reg.h375 #define SYSTEM_PERIP_RST_EN0_REG (DR_REG_SYSTEM_BASE + 0x20) macro