Searched refs:BIT5 (Results 1 – 19 of 19) sorted by relevance
44 #define BIT5 0x00000020 macro
191 #define BIT5 0x00000020 /**< preprocessor alias for 32-bit value with bit 5 set, used to specify… macro
114 … SOC_GPIO_DEEP_SLEEP_WAKEUP_VALID_GPIO_MASK (0ULL | BIT0 | BIT1 | BIT2 | BIT3 | BIT4 | BIT5)
102 … SOC_GPIO_DEEP_SLEEP_WAKEUP_VALID_GPIO_MASK (0ULL | BIT0 | BIT1 | BIT2 | BIT3 | BIT4 | BIT5)
122 MAC_TRIG = BIT5,
61 #define UART_TRX_FIFO_EMPTY_FLAG BIT5
124 #define ESP_ROM_SPIFLASH_BP_MASK_ISSI (BIT7 | BIT5 | BIT4 | BIT3 | BIT2)
103 MB_EVENT_COILS_RD = BIT5, /*!< Modbus Event Read Coils. */
124 MAC_TRIG = BIT5,
128 MAC_TRIG = BIT5,
134 MAC_TRIG = BIT5,
121 MAC_TRIG = BIT5,
59 #define UART_TRX_FIFO_EMPTY_FLAG BIT5
140 frame->blocks = (d1 & (BIT5 | BIT4)) >> 4; in OI_SBC_ReadHeader()
393 blocks = block_values[(blocks & (BIT5 | BIT4)) >> 4]; in OI_CODEC_SBC_FrameCount()
51 #define ESP_BOOTLOADER_SPIFLASH_BP_MASK_ISSI (BIT7 | BIT5 | BIT4 | BIT3 | BIT2)