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Searched refs:WoReg16 (Results 1 – 25 of 185) sorted by relevance

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/hal_atmel-latest/asf/sam0/include/samr35/instance/
Ddac.h61 #define REG_DAC_DATA0 (*(WoReg16*)0x42003010UL) /**< \brief (DAC) DAC 0 Data */
62 #define REG_DAC_DATA1 (*(WoReg16*)0x42003012UL) /**< \brief (DAC) DAC 1 Data */
63 #define REG_DAC_DATABUF0 (*(WoReg16*)0x42003014UL) /**< \brief (DAC) DAC 0 Data Buffer */
64 #define REG_DAC_DATABUF1 (*(WoReg16*)0x42003016UL) /**< \brief (DAC) DAC 1 Data Buffer */
/hal_atmel-latest/asf/sam0/include/saml21/instance/
Ddac.h61 #define REG_DAC_DATA0 (*(WoReg16*)0x42003010UL) /**< \brief (DAC) DAC 0 Data */
62 #define REG_DAC_DATA1 (*(WoReg16*)0x42003012UL) /**< \brief (DAC) DAC 1 Data */
63 #define REG_DAC_DATABUF0 (*(WoReg16*)0x42003014UL) /**< \brief (DAC) DAC 0 Data Buffer */
64 #define REG_DAC_DATABUF1 (*(WoReg16*)0x42003016UL) /**< \brief (DAC) DAC 1 Data Buffer */
/hal_atmel-latest/asf/sam0/include/samr34/instance/
Ddac.h61 #define REG_DAC_DATA0 (*(WoReg16*)0x42003010UL) /**< \brief (DAC) DAC 0 Data */
62 #define REG_DAC_DATA1 (*(WoReg16*)0x42003012UL) /**< \brief (DAC) DAC 1 Data */
63 #define REG_DAC_DATABUF0 (*(WoReg16*)0x42003014UL) /**< \brief (DAC) DAC 0 Data Buffer */
64 #define REG_DAC_DATABUF1 (*(WoReg16*)0x42003016UL) /**< \brief (DAC) DAC 1 Data Buffer */
/hal_atmel-latest/asf/sam0/include/samd51/instance/
Ddac.h63 #define REG_DAC_DATA0 (*(WoReg16*)0x43002410UL) /**< \brief (DAC) DAC 0 Data */
64 #define REG_DAC_DATA1 (*(WoReg16*)0x43002412UL) /**< \brief (DAC) DAC 1 Data */
65 #define REG_DAC_DATABUF0 (*(WoReg16*)0x43002414UL) /**< \brief (DAC) DAC 0 Data Buffer */
66 #define REG_DAC_DATABUF1 (*(WoReg16*)0x43002416UL) /**< \brief (DAC) DAC 1 Data Buffer */
Dsdhc0.h116 #define REG_SDHC0_FERACES (*(WoReg16*)0x45000050UL) /**< \brief (SDHC0) Force Event for Au…
117 #define REG_SDHC0_FEREIS (*(WoReg16*)0x45000052UL) /**< \brief (SDHC0) Force Event for Er…
Dsdhc1.h116 #define REG_SDHC1_FERACES (*(WoReg16*)0x46000050UL) /**< \brief (SDHC1) Force Event for Au…
117 #define REG_SDHC1_FEREIS (*(WoReg16*)0x46000052UL) /**< \brief (SDHC1) Force Event for Er…
Dnvmctrl.h52 #define REG_NVMCTRL_CTRLB (*(WoReg16*)0x41004004UL) /**< \brief (NVMCTRL) Control B */
/hal_atmel-latest/asf/sam0/include/same53/instance/
Ddac.h63 #define REG_DAC_DATA0 (*(WoReg16*)0x43002410UL) /**< \brief (DAC) DAC 0 Data */
64 #define REG_DAC_DATA1 (*(WoReg16*)0x43002412UL) /**< \brief (DAC) DAC 1 Data */
65 #define REG_DAC_DATABUF0 (*(WoReg16*)0x43002414UL) /**< \brief (DAC) DAC 0 Data Buffer */
66 #define REG_DAC_DATABUF1 (*(WoReg16*)0x43002416UL) /**< \brief (DAC) DAC 1 Data Buffer */
Dsdhc0.h116 #define REG_SDHC0_FERACES (*(WoReg16*)0x45000050UL) /**< \brief (SDHC0) Force Event for Au…
117 #define REG_SDHC0_FEREIS (*(WoReg16*)0x45000052UL) /**< \brief (SDHC0) Force Event for Er…
Dsdhc1.h116 #define REG_SDHC1_FERACES (*(WoReg16*)0x46000050UL) /**< \brief (SDHC1) Force Event for Au…
117 #define REG_SDHC1_FEREIS (*(WoReg16*)0x46000052UL) /**< \brief (SDHC1) Force Event for Er…
Dnvmctrl.h52 #define REG_NVMCTRL_CTRLB (*(WoReg16*)0x41004004UL) /**< \brief (NVMCTRL) Control B */
/hal_atmel-latest/asf/sam0/include/same51/instance/
Ddac.h63 #define REG_DAC_DATA0 (*(WoReg16*)0x43002410UL) /**< \brief (DAC) DAC 0 Data */
64 #define REG_DAC_DATA1 (*(WoReg16*)0x43002412UL) /**< \brief (DAC) DAC 1 Data */
65 #define REG_DAC_DATABUF0 (*(WoReg16*)0x43002414UL) /**< \brief (DAC) DAC 0 Data Buffer */
66 #define REG_DAC_DATABUF1 (*(WoReg16*)0x43002416UL) /**< \brief (DAC) DAC 1 Data Buffer */
Dsdhc0.h116 #define REG_SDHC0_FERACES (*(WoReg16*)0x45000050UL) /**< \brief (SDHC0) Force Event for Au…
117 #define REG_SDHC0_FEREIS (*(WoReg16*)0x45000052UL) /**< \brief (SDHC0) Force Event for Er…
Dnvmctrl.h52 #define REG_NVMCTRL_CTRLB (*(WoReg16*)0x41004004UL) /**< \brief (NVMCTRL) Control B */
/hal_atmel-latest/asf/sam0/include/same54/instance/
Ddac.h63 #define REG_DAC_DATA0 (*(WoReg16*)0x43002410UL) /**< \brief (DAC) DAC 0 Data */
64 #define REG_DAC_DATA1 (*(WoReg16*)0x43002412UL) /**< \brief (DAC) DAC 1 Data */
65 #define REG_DAC_DATABUF0 (*(WoReg16*)0x43002414UL) /**< \brief (DAC) DAC 0 Data Buffer */
66 #define REG_DAC_DATABUF1 (*(WoReg16*)0x43002416UL) /**< \brief (DAC) DAC 1 Data Buffer */
Dsdhc0.h116 #define REG_SDHC0_FERACES (*(WoReg16*)0x45000050UL) /**< \brief (SDHC0) Force Event for Au…
117 #define REG_SDHC0_FEREIS (*(WoReg16*)0x45000052UL) /**< \brief (SDHC0) Force Event for Er…
Dsdhc1.h116 #define REG_SDHC1_FERACES (*(WoReg16*)0x46000050UL) /**< \brief (SDHC1) Force Event for Au…
117 #define REG_SDHC1_FEREIS (*(WoReg16*)0x46000052UL) /**< \brief (SDHC1) Force Event for Er…
Dnvmctrl.h52 #define REG_NVMCTRL_CTRLB (*(WoReg16*)0x41004004UL) /**< \brief (NVMCTRL) Control B */
/hal_atmel-latest/asf/sam0/include/samc21n/instance/
Ddac.h54 #define REG_DAC_DATA (*(WoReg16*)0x42005408UL) /**< \brief (DAC) Data */
55 #define REG_DAC_DATABUF (*(WoReg16*)0x4200540CUL) /**< \brief (DAC) Data Buffer */
/hal_atmel-latest/asf/sam0/include/samc21/instance/
Ddac.h54 #define REG_DAC_DATA (*(WoReg16*)0x42005408UL) /**< \brief (DAC) Data */
55 #define REG_DAC_DATABUF (*(WoReg16*)0x4200540CUL) /**< \brief (DAC) Data Buffer */
/hal_atmel-latest/asf/sam0/include/samd20/
Dsamd20e14.h60 typedef volatile uint16_t WoReg16; /**< Write only 16-bit register (volatile unsigned int) */ typedef
Dsamd20e15.h60 typedef volatile uint16_t WoReg16; /**< Write only 16-bit register (volatile unsigned int) */ typedef
Dsamd20e16.h60 typedef volatile uint16_t WoReg16; /**< Write only 16-bit register (volatile unsigned int) */ typedef
Dsamd20e17.h60 typedef volatile uint16_t WoReg16; /**< Write only 16-bit register (volatile unsigned int) */ typedef
Dsamd20e18.h60 typedef volatile uint16_t WoReg16; /**< Write only 16-bit register (volatile unsigned int) */ typedef

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