1 /** 2 * \file 3 * 4 * \brief Instance description for DAC 5 * 6 * Copyright (c) 2018 Microchip Technology Inc. 7 * 8 * \asf_license_start 9 * 10 * \page License 11 * 12 * SPDX-License-Identifier: Apache-2.0 13 * 14 * Licensed under the Apache License, Version 2.0 (the "License"); you may 15 * not use this file except in compliance with the License. 16 * You may obtain a copy of the Licence at 17 * 18 * http://www.apache.org/licenses/LICENSE-2.0 19 * 20 * Unless required by applicable law or agreed to in writing, software 21 * distributed under the License is distributed on an AS IS BASIS, WITHOUT 22 * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 23 * See the License for the specific language governing permissions and 24 * limitations under the License. 25 * 26 * \asf_license_stop 27 * 28 */ 29 30 #ifndef _SAMC21_DAC_INSTANCE_ 31 #define _SAMC21_DAC_INSTANCE_ 32 33 /* ========== Register definition for DAC peripheral ========== */ 34 #if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) 35 #define REG_DAC_CTRLA (0x42005400) /**< \brief (DAC) Control A */ 36 #define REG_DAC_CTRLB (0x42005401) /**< \brief (DAC) Control B */ 37 #define REG_DAC_EVCTRL (0x42005402) /**< \brief (DAC) Event Control */ 38 #define REG_DAC_INTENCLR (0x42005404) /**< \brief (DAC) Interrupt Enable Clear */ 39 #define REG_DAC_INTENSET (0x42005405) /**< \brief (DAC) Interrupt Enable Set */ 40 #define REG_DAC_INTFLAG (0x42005406) /**< \brief (DAC) Interrupt Flag Status and Clear */ 41 #define REG_DAC_STATUS (0x42005407) /**< \brief (DAC) Status */ 42 #define REG_DAC_DATA (0x42005408) /**< \brief (DAC) Data */ 43 #define REG_DAC_DATABUF (0x4200540C) /**< \brief (DAC) Data Buffer */ 44 #define REG_DAC_SYNCBUSY (0x42005410) /**< \brief (DAC) Synchronization Busy */ 45 #define REG_DAC_DBGCTRL (0x42005414) /**< \brief (DAC) Debug Control */ 46 #else 47 #define REG_DAC_CTRLA (*(RwReg8 *)0x42005400UL) /**< \brief (DAC) Control A */ 48 #define REG_DAC_CTRLB (*(RwReg8 *)0x42005401UL) /**< \brief (DAC) Control B */ 49 #define REG_DAC_EVCTRL (*(RwReg8 *)0x42005402UL) /**< \brief (DAC) Event Control */ 50 #define REG_DAC_INTENCLR (*(RwReg8 *)0x42005404UL) /**< \brief (DAC) Interrupt Enable Clear */ 51 #define REG_DAC_INTENSET (*(RwReg8 *)0x42005405UL) /**< \brief (DAC) Interrupt Enable Set */ 52 #define REG_DAC_INTFLAG (*(RwReg8 *)0x42005406UL) /**< \brief (DAC) Interrupt Flag Status and Clear */ 53 #define REG_DAC_STATUS (*(RoReg8 *)0x42005407UL) /**< \brief (DAC) Status */ 54 #define REG_DAC_DATA (*(WoReg16*)0x42005408UL) /**< \brief (DAC) Data */ 55 #define REG_DAC_DATABUF (*(WoReg16*)0x4200540CUL) /**< \brief (DAC) Data Buffer */ 56 #define REG_DAC_SYNCBUSY (*(RoReg *)0x42005410UL) /**< \brief (DAC) Synchronization Busy */ 57 #define REG_DAC_DBGCTRL (*(RwReg8 *)0x42005414UL) /**< \brief (DAC) Debug Control */ 58 #endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */ 59 60 /* ========== Instance parameters for DAC peripheral ========== */ 61 #define DAC_DMAC_ID_EMPTY 45 // Index of DMA EMPTY trigger 62 #define DAC_GCLK_ID 36 63 64 #endif /* _SAMC21_DAC_INSTANCE_ */ 65
