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Searched refs:SR (Results 1 – 25 of 40) sorted by relevance

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/hal_atmel-latest/asf/sam/include/sam4l/component/
Dpicouart.h157 __I uint32_t SR; /**< \brief Offset: 0x08 (R/ 32) Status Register */ member
Dhcache.h235 __IO uint32_t SR; /**< \brief Offset: 0x0C (R/W 32) Status Register */ member
Dparc.h268 __I uint32_t SR; /**< \brief Offset: 0x14 (R/ 32) Status Register */ member
Dwdt.h269 __I uint32_t SR; /**< \brief Offset: 0x008 (R/ 32) Status Register */ member
Dcrccu.h368 __I uint32_t SR; /**< \brief Offset: 0x3C (R/ 32) Status Register */ member
Dsmap.h329 __I uint32_t SR; /**< \brief Offset: 0x04 (R/ 32) Status Register */ member
Dabdacb.h372 __I uint32_t SR; /**< \brief Offset: 0x20 (R/ 32) Status Register */ member
Daesa.h391 __I uint32_t SR; /**< \brief Offset: 0x0C (R/ 32) Status Register */ member
Dbpm.h485 __I uint32_t SR; /**< \brief Offset: 0x14 (R/ 32) Status Register */ member
Dpdca.h603 __I PDCA_SR_Type SR; /**< \brief Offset: 0x01C (R/ 32) Status Register */ member
Dadcife.h679 __I uint32_t SR; /**< \brief Offset: 0x08 (R/ 32) Status Register */ member
Diisc.h607 __I uint32_t SR; /**< \brief Offset: 0x08 (R/ 32) Status Register */ member
Dlcdca.h729 __I uint32_t SR; /**< \brief Offset: 0x0C (R/ 32) Status Register */ member
Dtwis.h694 __I uint32_t SR; /**< \brief Offset: 0x18 (R/ 32) Status Register */ member
Dacifc.h749 __I uint32_t SR; /**< \brief Offset: 0x04 (R/ 32) Status Register */ member
Dtwim.h744 __I uint32_t SR; /**< \brief Offset: 0x1C (R/ 32) Status Register */ member
Dast.h825 __I uint32_t SR; /**< \brief Offset: 0x08 (R/ 32) Status Register */ member
/hal_atmel-latest/asf/sam0/include/same51/component/
Dcmcc.h343 …__I CMCC_SR_Type SR; /**< \brief Offset: 0x0C (R/ 32) Cache Status Registe… member
Dicm.h554 __I ICM_SR_Type SR; /**< \brief Offset: 0x08 (R/ 32) Status */ member
/hal_atmel-latest/asf/sam0/include/samd51/component/
Dcmcc.h343 …__I CMCC_SR_Type SR; /**< \brief Offset: 0x0C (R/ 32) Cache Status Registe… member
Dicm.h554 __I ICM_SR_Type SR; /**< \brief Offset: 0x08 (R/ 32) Status */ member
/hal_atmel-latest/asf/sam0/include/same53/component/
Dcmcc.h343 …__I CMCC_SR_Type SR; /**< \brief Offset: 0x0C (R/ 32) Cache Status Registe… member
Dicm.h554 __I ICM_SR_Type SR; /**< \brief Offset: 0x08 (R/ 32) Status */ member
/hal_atmel-latest/asf/sam0/include/same54/component/
Dcmcc.h343 …__I CMCC_SR_Type SR; /**< \brief Offset: 0x0C (R/ 32) Cache Status Registe… member
Dicm.h554 __I ICM_SR_Type SR; /**< \brief Offset: 0x08 (R/ 32) Status */ member

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