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Searched refs:RoReg8 (Results 1 – 25 of 741) sorted by relevance

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/hal_atmel-latest/asf/sam0/include/samr21/instance/
Dusb.h179 #define REG_USB_SYNCBUSY (*(RoReg8 *)0x41005002UL) /**< \brief (USB) Synchronization Busy…
181 #define REG_USB_FSMSTATUS (*(RoReg8 *)0x4100500DUL) /**< \brief (USB) Finite State Machine…
186 #define REG_USB_DEVICE_STATUS (*(RoReg8 *)0x4100500CUL) /**< \brief (USB) DEVICE Status */
195 #define REG_USB_DEVICE_ENDPOINT_EPSTATUS0 (*(RoReg8 *)0x41005106UL) /**< \brief (USB) DEVICE_ENDPOI…
202 #define REG_USB_DEVICE_ENDPOINT_EPSTATUS1 (*(RoReg8 *)0x41005126UL) /**< \brief (USB) DEVICE_ENDPOI…
209 #define REG_USB_DEVICE_ENDPOINT_EPSTATUS2 (*(RoReg8 *)0x41005146UL) /**< \brief (USB) DEVICE_ENDPOI…
216 #define REG_USB_DEVICE_ENDPOINT_EPSTATUS3 (*(RoReg8 *)0x41005166UL) /**< \brief (USB) DEVICE_ENDPOI…
223 #define REG_USB_DEVICE_ENDPOINT_EPSTATUS4 (*(RoReg8 *)0x41005186UL) /**< \brief (USB) DEVICE_ENDPOI…
230 #define REG_USB_DEVICE_ENDPOINT_EPSTATUS5 (*(RoReg8 *)0x410051A6UL) /**< \brief (USB) DEVICE_ENDPOI…
237 #define REG_USB_DEVICE_ENDPOINT_EPSTATUS6 (*(RoReg8 *)0x410051C6UL) /**< \brief (USB) DEVICE_ENDPOI…
[all …]
/hal_atmel-latest/asf/sam0/include/samr34/instance/
Dusb.h180 #define REG_USB_SYNCBUSY (*(RoReg8 *)0x41000002UL) /**< \brief (USB) Synchronization Busy…
182 #define REG_USB_FSMSTATUS (*(RoReg8 *)0x4100000DUL) /**< \brief (USB) Finite State Machine…
187 #define REG_USB_DEVICE_STATUS (*(RoReg8 *)0x4100000CUL) /**< \brief (USB) DEVICE Status */
196 #define REG_USB_DEVICE_ENDPOINT_EPSTATUS0 (*(RoReg8 *)0x41000106UL) /**< \brief (USB) DEVICE_ENDPOI…
203 #define REG_USB_DEVICE_ENDPOINT_EPSTATUS1 (*(RoReg8 *)0x41000126UL) /**< \brief (USB) DEVICE_ENDPOI…
210 #define REG_USB_DEVICE_ENDPOINT_EPSTATUS2 (*(RoReg8 *)0x41000146UL) /**< \brief (USB) DEVICE_ENDPOI…
217 #define REG_USB_DEVICE_ENDPOINT_EPSTATUS3 (*(RoReg8 *)0x41000166UL) /**< \brief (USB) DEVICE_ENDPOI…
224 #define REG_USB_DEVICE_ENDPOINT_EPSTATUS4 (*(RoReg8 *)0x41000186UL) /**< \brief (USB) DEVICE_ENDPOI…
231 #define REG_USB_DEVICE_ENDPOINT_EPSTATUS5 (*(RoReg8 *)0x410001A6UL) /**< \brief (USB) DEVICE_ENDPOI…
238 #define REG_USB_DEVICE_ENDPOINT_EPSTATUS6 (*(RoReg8 *)0x410001C6UL) /**< \brief (USB) DEVICE_ENDPOI…
[all …]
/hal_atmel-latest/asf/sam0/include/samd21/instance/
Dusb.h179 #define REG_USB_SYNCBUSY (*(RoReg8 *)0x41005002UL) /**< \brief (USB) Synchronization Busy…
181 #define REG_USB_FSMSTATUS (*(RoReg8 *)0x4100500DUL) /**< \brief (USB) Finite State Machine…
186 #define REG_USB_DEVICE_STATUS (*(RoReg8 *)0x4100500CUL) /**< \brief (USB) DEVICE Status */
195 #define REG_USB_DEVICE_ENDPOINT_EPSTATUS0 (*(RoReg8 *)0x41005106UL) /**< \brief (USB) DEVICE_ENDPOI…
202 #define REG_USB_DEVICE_ENDPOINT_EPSTATUS1 (*(RoReg8 *)0x41005126UL) /**< \brief (USB) DEVICE_ENDPOI…
209 #define REG_USB_DEVICE_ENDPOINT_EPSTATUS2 (*(RoReg8 *)0x41005146UL) /**< \brief (USB) DEVICE_ENDPOI…
216 #define REG_USB_DEVICE_ENDPOINT_EPSTATUS3 (*(RoReg8 *)0x41005166UL) /**< \brief (USB) DEVICE_ENDPOI…
223 #define REG_USB_DEVICE_ENDPOINT_EPSTATUS4 (*(RoReg8 *)0x41005186UL) /**< \brief (USB) DEVICE_ENDPOI…
230 #define REG_USB_DEVICE_ENDPOINT_EPSTATUS5 (*(RoReg8 *)0x410051A6UL) /**< \brief (USB) DEVICE_ENDPOI…
237 #define REG_USB_DEVICE_ENDPOINT_EPSTATUS6 (*(RoReg8 *)0x410051C6UL) /**< \brief (USB) DEVICE_ENDPOI…
[all …]
Dac.h55 #define REG_AC_STATUSA (*(RoReg8 *)0x42004408UL) /**< \brief (AC) Status A */
56 #define REG_AC_STATUSB (*(RoReg8 *)0x42004409UL) /**< \brief (AC) Status B */
57 #define REG_AC_STATUSC (*(RoReg8 *)0x4200440AUL) /**< \brief (AC) Status C */
/hal_atmel-latest/asf/sam0/include/saml21/instance/
Dusb.h180 #define REG_USB_SYNCBUSY (*(RoReg8 *)0x41000002UL) /**< \brief (USB) Synchronization Busy…
182 #define REG_USB_FSMSTATUS (*(RoReg8 *)0x4100000DUL) /**< \brief (USB) Finite State Machine…
187 #define REG_USB_DEVICE_STATUS (*(RoReg8 *)0x4100000CUL) /**< \brief (USB) DEVICE Status */
196 #define REG_USB_DEVICE_ENDPOINT_EPSTATUS0 (*(RoReg8 *)0x41000106UL) /**< \brief (USB) DEVICE_ENDPOI…
203 #define REG_USB_DEVICE_ENDPOINT_EPSTATUS1 (*(RoReg8 *)0x41000126UL) /**< \brief (USB) DEVICE_ENDPOI…
210 #define REG_USB_DEVICE_ENDPOINT_EPSTATUS2 (*(RoReg8 *)0x41000146UL) /**< \brief (USB) DEVICE_ENDPOI…
217 #define REG_USB_DEVICE_ENDPOINT_EPSTATUS3 (*(RoReg8 *)0x41000166UL) /**< \brief (USB) DEVICE_ENDPOI…
224 #define REG_USB_DEVICE_ENDPOINT_EPSTATUS4 (*(RoReg8 *)0x41000186UL) /**< \brief (USB) DEVICE_ENDPOI…
231 #define REG_USB_DEVICE_ENDPOINT_EPSTATUS5 (*(RoReg8 *)0x410001A6UL) /**< \brief (USB) DEVICE_ENDPOI…
238 #define REG_USB_DEVICE_ENDPOINT_EPSTATUS6 (*(RoReg8 *)0x410001C6UL) /**< \brief (USB) DEVICE_ENDPOI…
[all …]
/hal_atmel-latest/asf/sam0/include/samd51/instance/
Dusb.h180 #define REG_USB_SYNCBUSY (*(RoReg8 *)0x41000002UL) /**< \brief (USB) Synchronization Busy…
182 #define REG_USB_FSMSTATUS (*(RoReg8 *)0x4100000DUL) /**< \brief (USB) Finite State Machine…
187 #define REG_USB_DEVICE_STATUS (*(RoReg8 *)0x4100000CUL) /**< \brief (USB) DEVICE Status */
196 #define REG_USB_DEVICE_ENDPOINT_EPSTATUS0 (*(RoReg8 *)0x41000106UL) /**< \brief (USB) DEVICE_ENDPOI…
203 #define REG_USB_DEVICE_ENDPOINT_EPSTATUS1 (*(RoReg8 *)0x41000126UL) /**< \brief (USB) DEVICE_ENDPOI…
210 #define REG_USB_DEVICE_ENDPOINT_EPSTATUS2 (*(RoReg8 *)0x41000146UL) /**< \brief (USB) DEVICE_ENDPOI…
217 #define REG_USB_DEVICE_ENDPOINT_EPSTATUS3 (*(RoReg8 *)0x41000166UL) /**< \brief (USB) DEVICE_ENDPOI…
224 #define REG_USB_DEVICE_ENDPOINT_EPSTATUS4 (*(RoReg8 *)0x41000186UL) /**< \brief (USB) DEVICE_ENDPOI…
231 #define REG_USB_DEVICE_ENDPOINT_EPSTATUS5 (*(RoReg8 *)0x410001A6UL) /**< \brief (USB) DEVICE_ENDPOI…
238 #define REG_USB_DEVICE_ENDPOINT_EPSTATUS6 (*(RoReg8 *)0x410001C6UL) /**< \brief (USB) DEVICE_ENDPOI…
[all …]
Devsys.h281 #define REG_EVSYS_CHSTATUS0 (*(RoReg8 *)0x4100E027UL) /**< \brief (EVSYS) Channel 0 Status */
286 #define REG_EVSYS_CHSTATUS1 (*(RoReg8 *)0x4100E02FUL) /**< \brief (EVSYS) Channel 1 Status */
291 #define REG_EVSYS_CHSTATUS2 (*(RoReg8 *)0x4100E037UL) /**< \brief (EVSYS) Channel 2 Status */
296 #define REG_EVSYS_CHSTATUS3 (*(RoReg8 *)0x4100E03FUL) /**< \brief (EVSYS) Channel 3 Status */
301 #define REG_EVSYS_CHSTATUS4 (*(RoReg8 *)0x4100E047UL) /**< \brief (EVSYS) Channel 4 Status */
306 #define REG_EVSYS_CHSTATUS5 (*(RoReg8 *)0x4100E04FUL) /**< \brief (EVSYS) Channel 5 Status */
311 #define REG_EVSYS_CHSTATUS6 (*(RoReg8 *)0x4100E057UL) /**< \brief (EVSYS) Channel 6 Status */
316 #define REG_EVSYS_CHSTATUS7 (*(RoReg8 *)0x4100E05FUL) /**< \brief (EVSYS) Channel 7 Status */
321 #define REG_EVSYS_CHSTATUS8 (*(RoReg8 *)0x4100E067UL) /**< \brief (EVSYS) Channel 8 Status */
326 #define REG_EVSYS_CHSTATUS9 (*(RoReg8 *)0x4100E06FUL) /**< \brief (EVSYS) Channel 9 Status */
[all …]
/hal_atmel-latest/asf/sam0/include/same51/instance/
Dusb.h180 #define REG_USB_SYNCBUSY (*(RoReg8 *)0x41000002UL) /**< \brief (USB) Synchronization Busy…
182 #define REG_USB_FSMSTATUS (*(RoReg8 *)0x4100000DUL) /**< \brief (USB) Finite State Machine…
187 #define REG_USB_DEVICE_STATUS (*(RoReg8 *)0x4100000CUL) /**< \brief (USB) DEVICE Status */
196 #define REG_USB_DEVICE_ENDPOINT_EPSTATUS0 (*(RoReg8 *)0x41000106UL) /**< \brief (USB) DEVICE_ENDPOI…
203 #define REG_USB_DEVICE_ENDPOINT_EPSTATUS1 (*(RoReg8 *)0x41000126UL) /**< \brief (USB) DEVICE_ENDPOI…
210 #define REG_USB_DEVICE_ENDPOINT_EPSTATUS2 (*(RoReg8 *)0x41000146UL) /**< \brief (USB) DEVICE_ENDPOI…
217 #define REG_USB_DEVICE_ENDPOINT_EPSTATUS3 (*(RoReg8 *)0x41000166UL) /**< \brief (USB) DEVICE_ENDPOI…
224 #define REG_USB_DEVICE_ENDPOINT_EPSTATUS4 (*(RoReg8 *)0x41000186UL) /**< \brief (USB) DEVICE_ENDPOI…
231 #define REG_USB_DEVICE_ENDPOINT_EPSTATUS5 (*(RoReg8 *)0x410001A6UL) /**< \brief (USB) DEVICE_ENDPOI…
238 #define REG_USB_DEVICE_ENDPOINT_EPSTATUS6 (*(RoReg8 *)0x410001C6UL) /**< \brief (USB) DEVICE_ENDPOI…
[all …]
Devsys.h281 #define REG_EVSYS_CHSTATUS0 (*(RoReg8 *)0x4100E027UL) /**< \brief (EVSYS) Channel 0 Status */
286 #define REG_EVSYS_CHSTATUS1 (*(RoReg8 *)0x4100E02FUL) /**< \brief (EVSYS) Channel 1 Status */
291 #define REG_EVSYS_CHSTATUS2 (*(RoReg8 *)0x4100E037UL) /**< \brief (EVSYS) Channel 2 Status */
296 #define REG_EVSYS_CHSTATUS3 (*(RoReg8 *)0x4100E03FUL) /**< \brief (EVSYS) Channel 3 Status */
301 #define REG_EVSYS_CHSTATUS4 (*(RoReg8 *)0x4100E047UL) /**< \brief (EVSYS) Channel 4 Status */
306 #define REG_EVSYS_CHSTATUS5 (*(RoReg8 *)0x4100E04FUL) /**< \brief (EVSYS) Channel 5 Status */
311 #define REG_EVSYS_CHSTATUS6 (*(RoReg8 *)0x4100E057UL) /**< \brief (EVSYS) Channel 6 Status */
316 #define REG_EVSYS_CHSTATUS7 (*(RoReg8 *)0x4100E05FUL) /**< \brief (EVSYS) Channel 7 Status */
321 #define REG_EVSYS_CHSTATUS8 (*(RoReg8 *)0x4100E067UL) /**< \brief (EVSYS) Channel 8 Status */
326 #define REG_EVSYS_CHSTATUS9 (*(RoReg8 *)0x4100E06FUL) /**< \brief (EVSYS) Channel 9 Status */
[all …]
/hal_atmel-latest/asf/sam0/include/same54/instance/
Dusb.h180 #define REG_USB_SYNCBUSY (*(RoReg8 *)0x41000002UL) /**< \brief (USB) Synchronization Busy…
182 #define REG_USB_FSMSTATUS (*(RoReg8 *)0x4100000DUL) /**< \brief (USB) Finite State Machine…
187 #define REG_USB_DEVICE_STATUS (*(RoReg8 *)0x4100000CUL) /**< \brief (USB) DEVICE Status */
196 #define REG_USB_DEVICE_ENDPOINT_EPSTATUS0 (*(RoReg8 *)0x41000106UL) /**< \brief (USB) DEVICE_ENDPOI…
203 #define REG_USB_DEVICE_ENDPOINT_EPSTATUS1 (*(RoReg8 *)0x41000126UL) /**< \brief (USB) DEVICE_ENDPOI…
210 #define REG_USB_DEVICE_ENDPOINT_EPSTATUS2 (*(RoReg8 *)0x41000146UL) /**< \brief (USB) DEVICE_ENDPOI…
217 #define REG_USB_DEVICE_ENDPOINT_EPSTATUS3 (*(RoReg8 *)0x41000166UL) /**< \brief (USB) DEVICE_ENDPOI…
224 #define REG_USB_DEVICE_ENDPOINT_EPSTATUS4 (*(RoReg8 *)0x41000186UL) /**< \brief (USB) DEVICE_ENDPOI…
231 #define REG_USB_DEVICE_ENDPOINT_EPSTATUS5 (*(RoReg8 *)0x410001A6UL) /**< \brief (USB) DEVICE_ENDPOI…
238 #define REG_USB_DEVICE_ENDPOINT_EPSTATUS6 (*(RoReg8 *)0x410001C6UL) /**< \brief (USB) DEVICE_ENDPOI…
[all …]
Devsys.h281 #define REG_EVSYS_CHSTATUS0 (*(RoReg8 *)0x4100E027UL) /**< \brief (EVSYS) Channel 0 Status */
286 #define REG_EVSYS_CHSTATUS1 (*(RoReg8 *)0x4100E02FUL) /**< \brief (EVSYS) Channel 1 Status */
291 #define REG_EVSYS_CHSTATUS2 (*(RoReg8 *)0x4100E037UL) /**< \brief (EVSYS) Channel 2 Status */
296 #define REG_EVSYS_CHSTATUS3 (*(RoReg8 *)0x4100E03FUL) /**< \brief (EVSYS) Channel 3 Status */
301 #define REG_EVSYS_CHSTATUS4 (*(RoReg8 *)0x4100E047UL) /**< \brief (EVSYS) Channel 4 Status */
306 #define REG_EVSYS_CHSTATUS5 (*(RoReg8 *)0x4100E04FUL) /**< \brief (EVSYS) Channel 5 Status */
311 #define REG_EVSYS_CHSTATUS6 (*(RoReg8 *)0x4100E057UL) /**< \brief (EVSYS) Channel 6 Status */
316 #define REG_EVSYS_CHSTATUS7 (*(RoReg8 *)0x4100E05FUL) /**< \brief (EVSYS) Channel 7 Status */
321 #define REG_EVSYS_CHSTATUS8 (*(RoReg8 *)0x4100E067UL) /**< \brief (EVSYS) Channel 8 Status */
326 #define REG_EVSYS_CHSTATUS9 (*(RoReg8 *)0x4100E06FUL) /**< \brief (EVSYS) Channel 9 Status */
[all …]
/hal_atmel-latest/asf/sam0/include/same53/instance/
Dusb.h180 #define REG_USB_SYNCBUSY (*(RoReg8 *)0x41000002UL) /**< \brief (USB) Synchronization Busy…
182 #define REG_USB_FSMSTATUS (*(RoReg8 *)0x4100000DUL) /**< \brief (USB) Finite State Machine…
187 #define REG_USB_DEVICE_STATUS (*(RoReg8 *)0x4100000CUL) /**< \brief (USB) DEVICE Status */
196 #define REG_USB_DEVICE_ENDPOINT_EPSTATUS0 (*(RoReg8 *)0x41000106UL) /**< \brief (USB) DEVICE_ENDPOI…
203 #define REG_USB_DEVICE_ENDPOINT_EPSTATUS1 (*(RoReg8 *)0x41000126UL) /**< \brief (USB) DEVICE_ENDPOI…
210 #define REG_USB_DEVICE_ENDPOINT_EPSTATUS2 (*(RoReg8 *)0x41000146UL) /**< \brief (USB) DEVICE_ENDPOI…
217 #define REG_USB_DEVICE_ENDPOINT_EPSTATUS3 (*(RoReg8 *)0x41000166UL) /**< \brief (USB) DEVICE_ENDPOI…
224 #define REG_USB_DEVICE_ENDPOINT_EPSTATUS4 (*(RoReg8 *)0x41000186UL) /**< \brief (USB) DEVICE_ENDPOI…
231 #define REG_USB_DEVICE_ENDPOINT_EPSTATUS5 (*(RoReg8 *)0x410001A6UL) /**< \brief (USB) DEVICE_ENDPOI…
238 #define REG_USB_DEVICE_ENDPOINT_EPSTATUS6 (*(RoReg8 *)0x410001C6UL) /**< \brief (USB) DEVICE_ENDPOI…
[all …]
Devsys.h281 #define REG_EVSYS_CHSTATUS0 (*(RoReg8 *)0x4100E027UL) /**< \brief (EVSYS) Channel 0 Status */
286 #define REG_EVSYS_CHSTATUS1 (*(RoReg8 *)0x4100E02FUL) /**< \brief (EVSYS) Channel 1 Status */
291 #define REG_EVSYS_CHSTATUS2 (*(RoReg8 *)0x4100E037UL) /**< \brief (EVSYS) Channel 2 Status */
296 #define REG_EVSYS_CHSTATUS3 (*(RoReg8 *)0x4100E03FUL) /**< \brief (EVSYS) Channel 3 Status */
301 #define REG_EVSYS_CHSTATUS4 (*(RoReg8 *)0x4100E047UL) /**< \brief (EVSYS) Channel 4 Status */
306 #define REG_EVSYS_CHSTATUS5 (*(RoReg8 *)0x4100E04FUL) /**< \brief (EVSYS) Channel 5 Status */
311 #define REG_EVSYS_CHSTATUS6 (*(RoReg8 *)0x4100E057UL) /**< \brief (EVSYS) Channel 6 Status */
316 #define REG_EVSYS_CHSTATUS7 (*(RoReg8 *)0x4100E05FUL) /**< \brief (EVSYS) Channel 7 Status */
321 #define REG_EVSYS_CHSTATUS8 (*(RoReg8 *)0x4100E067UL) /**< \brief (EVSYS) Channel 8 Status */
326 #define REG_EVSYS_CHSTATUS9 (*(RoReg8 *)0x4100E06FUL) /**< \brief (EVSYS) Channel 9 Status */
[all …]
/hal_atmel-latest/asf/sam0/include/samr34/component/
Dsercom.h1348 RoReg8 Reserved1[0x4];
1350 RoReg8 Reserved2[0x4];
1352 RoReg8 Reserved3[0x1];
1354 RoReg8 Reserved4[0x1];
1356 RoReg8 Reserved5[0x1];
1359 RoReg8 Reserved6[0x4];
1362 RoReg8 Reserved7[0x7];
1372 RoReg8 Reserved1[0xC];
1374 RoReg8 Reserved2[0x1];
1376 RoReg8 Reserved3[0x1];
[all …]
Drstc.h193 RoReg8 Reserved1[0x1];
195 RoReg8 Reserved2[0x1];
197 RoReg8 Reserved3[0x3];
199 RoReg8 Reserved4[0x2];
201 RoReg8 Reserved5[0x2];
/hal_atmel-latest/asf/sam0/include/samd21/component/
Dsercom.h1395 RoReg8 Reserved1[0x4];
1397 RoReg8 Reserved2[0x4];
1399 RoReg8 Reserved3[0x1];
1401 RoReg8 Reserved4[0x1];
1403 RoReg8 Reserved5[0x1];
1406 RoReg8 Reserved6[0x4];
1409 RoReg8 Reserved7[0x7];
1419 RoReg8 Reserved1[0xC];
1421 RoReg8 Reserved2[0x1];
1423 RoReg8 Reserved3[0x1];
[all …]
/hal_atmel-latest/asf/sam0/include/samr35/component/
Dsercom.h1348 RoReg8 Reserved1[0x4];
1350 RoReg8 Reserved2[0x4];
1352 RoReg8 Reserved3[0x1];
1354 RoReg8 Reserved4[0x1];
1356 RoReg8 Reserved5[0x1];
1359 RoReg8 Reserved6[0x4];
1362 RoReg8 Reserved7[0x7];
1372 RoReg8 Reserved1[0xC];
1374 RoReg8 Reserved2[0x1];
1376 RoReg8 Reserved3[0x1];
[all …]
Drstc.h193 RoReg8 Reserved1[0x1];
195 RoReg8 Reserved2[0x1];
197 RoReg8 Reserved3[0x3];
199 RoReg8 Reserved4[0x2];
201 RoReg8 Reserved5[0x2];
/hal_atmel-latest/asf/sam0/include/saml21/component/
Dsercom.h1348 RoReg8 Reserved1[0x4];
1350 RoReg8 Reserved2[0x4];
1352 RoReg8 Reserved3[0x1];
1354 RoReg8 Reserved4[0x1];
1356 RoReg8 Reserved5[0x1];
1359 RoReg8 Reserved6[0x4];
1362 RoReg8 Reserved7[0x7];
1372 RoReg8 Reserved1[0xC];
1374 RoReg8 Reserved2[0x1];
1376 RoReg8 Reserved3[0x1];
[all …]
Drstc.h193 RoReg8 Reserved1[0x1];
195 RoReg8 Reserved2[0x1];
197 RoReg8 Reserved3[0x3];
199 RoReg8 Reserved4[0x2];
201 RoReg8 Reserved5[0x2];
/hal_atmel-latest/asf/sam0/include/samr21/component/
Dsercom.h1395 RoReg8 Reserved1[0x4];
1397 RoReg8 Reserved2[0x4];
1399 RoReg8 Reserved3[0x1];
1401 RoReg8 Reserved4[0x1];
1403 RoReg8 Reserved5[0x1];
1406 RoReg8 Reserved6[0x4];
1409 RoReg8 Reserved7[0x7];
1419 RoReg8 Reserved1[0xC];
1421 RoReg8 Reserved2[0x1];
1423 RoReg8 Reserved3[0x1];
[all …]
/hal_atmel-latest/asf/sam0/include/samc20n/component/
Dsercom.h1384 RoReg8 Reserved1[0x4];
1386 RoReg8 Reserved2[0x4];
1388 RoReg8 Reserved3[0x1];
1390 RoReg8 Reserved4[0x1];
1392 RoReg8 Reserved5[0x1];
1395 RoReg8 Reserved6[0x4];
1398 RoReg8 Reserved7[0x7];
1408 RoReg8 Reserved1[0xC];
1410 RoReg8 Reserved2[0x1];
1412 RoReg8 Reserved3[0x1];
[all …]
/hal_atmel-latest/asf/sam0/include/samc21/component/
Dsercom.h1384 RoReg8 Reserved1[0x4];
1386 RoReg8 Reserved2[0x4];
1388 RoReg8 Reserved3[0x1];
1390 RoReg8 Reserved4[0x1];
1392 RoReg8 Reserved5[0x1];
1395 RoReg8 Reserved6[0x4];
1398 RoReg8 Reserved7[0x7];
1408 RoReg8 Reserved1[0xC];
1410 RoReg8 Reserved2[0x1];
1412 RoReg8 Reserved3[0x1];
[all …]
/hal_atmel-latest/asf/sam0/include/samc20/component/
Dsercom.h1384 RoReg8 Reserved1[0x4];
1386 RoReg8 Reserved2[0x4];
1388 RoReg8 Reserved3[0x1];
1390 RoReg8 Reserved4[0x1];
1392 RoReg8 Reserved5[0x1];
1395 RoReg8 Reserved6[0x4];
1398 RoReg8 Reserved7[0x7];
1408 RoReg8 Reserved1[0xC];
1410 RoReg8 Reserved2[0x1];
1412 RoReg8 Reserved3[0x1];
[all …]
/hal_atmel-latest/asf/sam0/include/samc21n/component/
Dsercom.h1384 RoReg8 Reserved1[0x4];
1386 RoReg8 Reserved2[0x4];
1388 RoReg8 Reserved3[0x1];
1390 RoReg8 Reserved4[0x1];
1392 RoReg8 Reserved5[0x1];
1395 RoReg8 Reserved6[0x4];
1398 RoReg8 Reserved7[0x7];
1408 RoReg8 Reserved1[0xC];
1410 RoReg8 Reserved2[0x1];
1412 RoReg8 Reserved3[0x1];
[all …]

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