| /hal_atmel-latest/asf/sam0/include/samr21/instance/ |
| D | eic.h | 36 #define REG_EIC_NMICTRL (0x40001802) /**< \brief (EIC) Non-Maskable Interrupt Control */ macro
48 #define REG_EIC_NMICTRL (*(RwReg8 *)0x40001802UL) /**< \brief (EIC) Non-Maskable Interru… macro
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| /hal_atmel-latest/asf/sam0/include/samd21/instance/ |
| D | eic.h | 36 #define REG_EIC_NMICTRL (0x40001802) /**< \brief (EIC) Non-Maskable Interrupt Control */ macro
48 #define REG_EIC_NMICTRL (*(RwReg8 *)0x40001802UL) /**< \brief (EIC) Non-Maskable Interru… macro
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| /hal_atmel-latest/asf/sam0/include/samc21/instance/ |
| D | eic.h | 36 #define REG_EIC_NMICTRL (0x40002801) /**< \brief (EIC) NMI Control */ macro
48 #define REG_EIC_NMICTRL (*(RwReg8 *)0x40002801UL) /**< \brief (EIC) NMI Control */ macro
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| /hal_atmel-latest/asf/sam0/include/samc20/instance/ |
| D | eic.h | 36 #define REG_EIC_NMICTRL (0x40002801) /**< \brief (EIC) NMI Control */ macro
48 #define REG_EIC_NMICTRL (*(RwReg8 *)0x40002801UL) /**< \brief (EIC) NMI Control */ macro
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| /hal_atmel-latest/asf/sam0/include/samr34/instance/ |
| D | eic.h | 36 #define REG_EIC_NMICTRL (0x40002401) /**< \brief (EIC) NMI Control */ macro
48 #define REG_EIC_NMICTRL (*(RwReg8 *)0x40002401UL) /**< \brief (EIC) NMI Control */ macro
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| /hal_atmel-latest/asf/sam0/include/samr35/instance/ |
| D | eic.h | 36 #define REG_EIC_NMICTRL (0x40002401) /**< \brief (EIC) NMI Control */ macro
48 #define REG_EIC_NMICTRL (*(RwReg8 *)0x40002401UL) /**< \brief (EIC) NMI Control */ macro
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| /hal_atmel-latest/asf/sam0/include/saml21/instance/ |
| D | eic.h | 36 #define REG_EIC_NMICTRL (0x40002401) /**< \brief (EIC) NMI Control */ macro
48 #define REG_EIC_NMICTRL (*(RwReg8 *)0x40002401UL) /**< \brief (EIC) NMI Control */ macro
|
| /hal_atmel-latest/asf/sam0/include/samd20/instance/ |
| D | eic.h | 37 #define REG_EIC_NMICTRL (0x40001802) /**< \brief (EIC) Non-Maskable Interrupt Control */ macro
49 #define REG_EIC_NMICTRL (*(RwReg8 *)0x40001802UL) /**< \brief (EIC) Non-Maskable Interru… macro
|
| /hal_atmel-latest/asf/sam0/include/samd51/instance/ |
| D | eic.h | 36 #define REG_EIC_NMICTRL (0x40002801) /**< \brief (EIC) Non-Maskable Interrupt Control */ macro
51 #define REG_EIC_NMICTRL (*(RwReg8 *)0x40002801UL) /**< \brief (EIC) Non-Maskable Interru… macro
|
| /hal_atmel-latest/asf/sam0/include/samc20n/instance/ |
| D | eic.h | 36 #define REG_EIC_NMICTRL (0x40002801) /**< \brief (EIC) Non-Maskable Interrupt Control */ macro
51 #define REG_EIC_NMICTRL (*(RwReg8 *)0x40002801UL) /**< \brief (EIC) Non-Maskable Interru… macro
|
| /hal_atmel-latest/asf/sam0/include/same53/instance/ |
| D | eic.h | 36 #define REG_EIC_NMICTRL (0x40002801) /**< \brief (EIC) Non-Maskable Interrupt Control */ macro
51 #define REG_EIC_NMICTRL (*(RwReg8 *)0x40002801UL) /**< \brief (EIC) Non-Maskable Interru… macro
|
| /hal_atmel-latest/asf/sam0/include/same51/instance/ |
| D | eic.h | 36 #define REG_EIC_NMICTRL (0x40002801) /**< \brief (EIC) Non-Maskable Interrupt Control */ macro
51 #define REG_EIC_NMICTRL (*(RwReg8 *)0x40002801UL) /**< \brief (EIC) Non-Maskable Interru… macro
|
| /hal_atmel-latest/asf/sam0/include/samc21n/instance/ |
| D | eic.h | 36 #define REG_EIC_NMICTRL (0x40002801) /**< \brief (EIC) Non-Maskable Interrupt Control */ macro
51 #define REG_EIC_NMICTRL (*(RwReg8 *)0x40002801UL) /**< \brief (EIC) Non-Maskable Interru… macro
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| /hal_atmel-latest/asf/sam0/include/same54/instance/ |
| D | eic.h | 36 #define REG_EIC_NMICTRL (0x40002801) /**< \brief (EIC) Non-Maskable Interrupt Control */ macro
51 #define REG_EIC_NMICTRL (*(RwReg8 *)0x40002801UL) /**< \brief (EIC) Non-Maskable Interru… macro
|
