| /hal_atmel-latest/asf/sam0/include/samr21/instance/ |
| D | eic.h | 39 #define REG_EIC_INTENCLR (0x40001808) /**< \brief (EIC) Interrupt Enable Clear */ macro
51 #define REG_EIC_INTENCLR (*(RwReg *)0x40001808UL) /**< \brief (EIC) Interrupt Enable Cle… macro
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| /hal_atmel-latest/asf/sam0/include/samd21/instance/ |
| D | eic.h | 39 #define REG_EIC_INTENCLR (0x40001808) /**< \brief (EIC) Interrupt Enable Clear */ macro
51 #define REG_EIC_INTENCLR (*(RwReg *)0x40001808UL) /**< \brief (EIC) Interrupt Enable Cle… macro
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| /hal_atmel-latest/asf/sam0/include/samc21/instance/ |
| D | eic.h | 40 #define REG_EIC_INTENCLR (0x4000280C) /**< \brief (EIC) Interrupt Enable Clear */ macro
52 #define REG_EIC_INTENCLR (*(RwReg *)0x4000280CUL) /**< \brief (EIC) Interrupt Enable Cle… macro
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| /hal_atmel-latest/asf/sam0/include/samc20/instance/ |
| D | eic.h | 40 #define REG_EIC_INTENCLR (0x4000280C) /**< \brief (EIC) Interrupt Enable Clear */ macro
52 #define REG_EIC_INTENCLR (*(RwReg *)0x4000280CUL) /**< \brief (EIC) Interrupt Enable Cle… macro
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| /hal_atmel-latest/asf/sam0/include/samr34/instance/ |
| D | eic.h | 40 #define REG_EIC_INTENCLR (0x4000240C) /**< \brief (EIC) Interrupt Enable Clear */ macro
52 #define REG_EIC_INTENCLR (*(RwReg *)0x4000240CUL) /**< \brief (EIC) Interrupt Enable Cle… macro
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| /hal_atmel-latest/asf/sam0/include/samr35/instance/ |
| D | eic.h | 40 #define REG_EIC_INTENCLR (0x4000240C) /**< \brief (EIC) Interrupt Enable Clear */ macro
52 #define REG_EIC_INTENCLR (*(RwReg *)0x4000240CUL) /**< \brief (EIC) Interrupt Enable Cle… macro
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| /hal_atmel-latest/asf/sam0/include/saml21/instance/ |
| D | eic.h | 40 #define REG_EIC_INTENCLR (0x4000240C) /**< \brief (EIC) Interrupt Enable Clear */ macro
52 #define REG_EIC_INTENCLR (*(RwReg *)0x4000240CUL) /**< \brief (EIC) Interrupt Enable Cle… macro
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| /hal_atmel-latest/asf/sam0/include/samd20/instance/ |
| D | eic.h | 40 #define REG_EIC_INTENCLR (0x40001808) /**< \brief (EIC) Interrupt Enable Clear */ macro
52 #define REG_EIC_INTENCLR (*(RwReg *)0x40001808UL) /**< \brief (EIC) Interrupt Enable Cle… macro
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| /hal_atmel-latest/asf/sam0/include/samd51/instance/ |
| D | eic.h | 40 #define REG_EIC_INTENCLR (0x4000280C) /**< \brief (EIC) Interrupt Enable Clear */ macro
55 #define REG_EIC_INTENCLR (*(RwReg *)0x4000280CUL) /**< \brief (EIC) Interrupt Enable Cle… macro
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| /hal_atmel-latest/asf/sam0/include/samc20n/instance/ |
| D | eic.h | 40 #define REG_EIC_INTENCLR (0x4000280C) /**< \brief (EIC) Interrupt Enable Clear */ macro
55 #define REG_EIC_INTENCLR (*(RwReg *)0x4000280CUL) /**< \brief (EIC) Interrupt Enable Cle… macro
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| /hal_atmel-latest/asf/sam0/include/same53/instance/ |
| D | eic.h | 40 #define REG_EIC_INTENCLR (0x4000280C) /**< \brief (EIC) Interrupt Enable Clear */ macro
55 #define REG_EIC_INTENCLR (*(RwReg *)0x4000280CUL) /**< \brief (EIC) Interrupt Enable Cle… macro
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| /hal_atmel-latest/asf/sam0/include/same51/instance/ |
| D | eic.h | 40 #define REG_EIC_INTENCLR (0x4000280C) /**< \brief (EIC) Interrupt Enable Clear */ macro
55 #define REG_EIC_INTENCLR (*(RwReg *)0x4000280CUL) /**< \brief (EIC) Interrupt Enable Cle… macro
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| /hal_atmel-latest/asf/sam0/include/samc21n/instance/ |
| D | eic.h | 40 #define REG_EIC_INTENCLR (0x4000280C) /**< \brief (EIC) Interrupt Enable Clear */ macro
55 #define REG_EIC_INTENCLR (*(RwReg *)0x4000280CUL) /**< \brief (EIC) Interrupt Enable Cle… macro
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| /hal_atmel-latest/asf/sam0/include/same54/instance/ |
| D | eic.h | 40 #define REG_EIC_INTENCLR (0x4000280C) /**< \brief (EIC) Interrupt Enable Clear */ macro
55 #define REG_EIC_INTENCLR (*(RwReg *)0x4000280CUL) /**< \brief (EIC) Interrupt Enable Cle… macro
|
