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Searched refs:REG_CAN0_MMR5 (Results 1 – 2 of 2) sorted by relevance

/hal_atmel-latest/asf/sam/include/sam4e/instance/
Dcan0.h88 #define REG_CAN0_MMR5 (0x400102A0U) /**< \brief (CAN0) Mailbox Mode Register (MB = 5) */ macro
166 #define REG_CAN0_MMR5 (*(RwReg*)0x400102A0U) /**< \brief (CAN0) Mailbox Mode Register (MB = 5) */ macro
/hal_atmel-latest/asf/sam/include/sam3x/instance/
Dcan0.h88 …#define REG_CAN0_MMR5 (0x400B42A0U) /**< \brief (CAN0) Mailbox Mode Register (… macro
166 …#define REG_CAN0_MMR5 (*(__IO uint32_t*)0x400B42A0U) /**< \brief (CAN0) Mailbox Mode Register (… macro