Searched refs:REG_AFEC0_IER (Results 1 – 5 of 5) sorted by relevance
44 #define REG_AFEC0_IER (0x400B0024U) /**< \brief (AFEC0) Interrupt Enable Register */ macro77 #define REG_AFEC0_IER (*(WoReg*)0x400B0024U) /**< \brief (AFEC0) Interrupt Enable Register */ macro
46 #define REG_AFEC0_IER (0x4003C024) /**< (AFEC0) AFEC Interrupt Enable Register */ macro79 #define REG_AFEC0_IER (*(__O uint32_t*)0x4003C024U) /**< (AFEC0) AFEC Interrupt Enable R… macro
46 #define REG_AFEC0_IER (0x4003C024) /**< (AFEC0) AFEC Interrupt Enable Register */ macro78 #define REG_AFEC0_IER (*(__O uint32_t*)0x4003C024U) /**< (AFEC0) AFEC Interrupt Enable R… macro
