Searched refs:REG_AFEC0_CSELR (Results 1 – 5 of 5) sorted by relevance
53 #define REG_AFEC0_CSELR (0x400B0064U) /**< \brief (AFEC0) Channel Register Selection */ macro86 #define REG_AFEC0_CSELR (*(RoReg*)0x400B0064U) /**< \brief (AFEC0) Channel Register Selection */ macro
54 #define REG_AFEC0_CSELR (0x4003C064) /**< (AFEC0) AFEC Channel Selection Register */ macro87 #define REG_AFEC0_CSELR (*(__IO uint32_t*)0x4003C064U) /**< (AFEC0) AFEC Channel Selection … macro
54 #define REG_AFEC0_CSELR (0x4003C064) /**< (AFEC0) AFEC Channel Selection Register */ macro86 #define REG_AFEC0_CSELR (*(__IO uint32_t*)0x4003C064U) /**< (AFEC0) AFEC Channel Selection … macro
