/hal_atmel-3.5.0-3.4.0/asf/sam0/include/samd20/pio/ |
D | samd20e18.h | 103 #define MUX_PA15H_GCLK_IO1 _L_(7) macro 104 #define PINMUX_PA15H_GCLK_IO1 ((PIN_PA15H_GCLK_IO1 << 16) | MUX_PA15H_GCLK_IO1)
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D | samd20e15.h | 103 #define MUX_PA15H_GCLK_IO1 _L_(7) macro 104 #define PINMUX_PA15H_GCLK_IO1 ((PIN_PA15H_GCLK_IO1 << 16) | MUX_PA15H_GCLK_IO1)
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D | samd20e16.h | 103 #define MUX_PA15H_GCLK_IO1 _L_(7) macro 104 #define PINMUX_PA15H_GCLK_IO1 ((PIN_PA15H_GCLK_IO1 << 16) | MUX_PA15H_GCLK_IO1)
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D | samd20e17.h | 103 #define MUX_PA15H_GCLK_IO1 _L_(7) macro 104 #define PINMUX_PA15H_GCLK_IO1 ((PIN_PA15H_GCLK_IO1 << 16) | MUX_PA15H_GCLK_IO1)
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D | samd20e14.h | 103 #define MUX_PA15H_GCLK_IO1 _L_(7) macro 104 #define PINMUX_PA15H_GCLK_IO1 ((PIN_PA15H_GCLK_IO1 << 16) | MUX_PA15H_GCLK_IO1)
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D | samd20g18u.h | 121 #define MUX_PA15H_GCLK_IO1 _L_(7) macro 122 #define PINMUX_PA15H_GCLK_IO1 ((PIN_PA15H_GCLK_IO1 << 16) | MUX_PA15H_GCLK_IO1)
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D | samd20g17u.h | 121 #define MUX_PA15H_GCLK_IO1 _L_(7) macro 122 #define PINMUX_PA15H_GCLK_IO1 ((PIN_PA15H_GCLK_IO1 << 16) | MUX_PA15H_GCLK_IO1)
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D | samd20g14.h | 135 #define MUX_PA15H_GCLK_IO1 _L_(7) macro 136 #define PINMUX_PA15H_GCLK_IO1 ((PIN_PA15H_GCLK_IO1 << 16) | MUX_PA15H_GCLK_IO1)
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D | samd20g15.h | 135 #define MUX_PA15H_GCLK_IO1 _L_(7) macro 136 #define PINMUX_PA15H_GCLK_IO1 ((PIN_PA15H_GCLK_IO1 << 16) | MUX_PA15H_GCLK_IO1)
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D | samd20g16.h | 135 #define MUX_PA15H_GCLK_IO1 _L_(7) macro 136 #define PINMUX_PA15H_GCLK_IO1 ((PIN_PA15H_GCLK_IO1 << 16) | MUX_PA15H_GCLK_IO1)
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D | samd20g17.h | 135 #define MUX_PA15H_GCLK_IO1 _L_(7) macro 136 #define PINMUX_PA15H_GCLK_IO1 ((PIN_PA15H_GCLK_IO1 << 16) | MUX_PA15H_GCLK_IO1)
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/hal_atmel-3.5.0-3.4.0/asf/sam0/include/samd21/pio/ |
D | samd21e18a.h | 102 #define MUX_PA15H_GCLK_IO1 _L_(7) macro 103 #define PINMUX_PA15H_GCLK_IO1 ((PIN_PA15H_GCLK_IO1 << 16) | MUX_PA15H_GCLK_IO1)
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D | samd21e15a.h | 102 #define MUX_PA15H_GCLK_IO1 _L_(7) macro 103 #define PINMUX_PA15H_GCLK_IO1 ((PIN_PA15H_GCLK_IO1 << 16) | MUX_PA15H_GCLK_IO1)
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D | samd21e16a.h | 102 #define MUX_PA15H_GCLK_IO1 _L_(7) macro 103 #define PINMUX_PA15H_GCLK_IO1 ((PIN_PA15H_GCLK_IO1 << 16) | MUX_PA15H_GCLK_IO1)
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D | samd21e17a.h | 102 #define MUX_PA15H_GCLK_IO1 _L_(7) macro 103 #define PINMUX_PA15H_GCLK_IO1 ((PIN_PA15H_GCLK_IO1 << 16) | MUX_PA15H_GCLK_IO1)
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/hal_atmel-3.5.0-3.4.0/asf/sam0/include/samr21/pio/ |
D | samr21e16a.h | 120 #define MUX_PA15H_GCLK_IO1 _L_(7) macro 121 #define PINMUX_PA15H_GCLK_IO1 ((PIN_PA15H_GCLK_IO1 << 16) | MUX_PA15H_GCLK_IO1)
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D | samr21e17a.h | 120 #define MUX_PA15H_GCLK_IO1 _L_(7) macro 121 #define PINMUX_PA15H_GCLK_IO1 ((PIN_PA15H_GCLK_IO1 << 16) | MUX_PA15H_GCLK_IO1)
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D | samr21e18a.h | 120 #define MUX_PA15H_GCLK_IO1 _L_(7) macro 121 #define PINMUX_PA15H_GCLK_IO1 ((PIN_PA15H_GCLK_IO1 << 16) | MUX_PA15H_GCLK_IO1)
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/hal_atmel-3.5.0-3.4.0/asf/sam0/include/samc20/pio/ |
D | samc20e15a.h | 160 #define MUX_PA15H_GCLK_IO1 _L_(7) macro 161 #define PINMUX_PA15H_GCLK_IO1 ((PIN_PA15H_GCLK_IO1 << 16) | MUX_PA15H_GCLK_IO1)
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D | samc20e16a.h | 160 #define MUX_PA15H_GCLK_IO1 _L_(7) macro 161 #define PINMUX_PA15H_GCLK_IO1 ((PIN_PA15H_GCLK_IO1 << 16) | MUX_PA15H_GCLK_IO1)
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D | samc20e17a.h | 160 #define MUX_PA15H_GCLK_IO1 _L_(7) macro 161 #define PINMUX_PA15H_GCLK_IO1 ((PIN_PA15H_GCLK_IO1 << 16) | MUX_PA15H_GCLK_IO1)
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D | samc20e18a.h | 160 #define MUX_PA15H_GCLK_IO1 _L_(7) macro 161 #define PINMUX_PA15H_GCLK_IO1 ((PIN_PA15H_GCLK_IO1 << 16) | MUX_PA15H_GCLK_IO1)
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/hal_atmel-3.5.0-3.4.0/asf/sam0/include/saml21/pio/ |
D | saml21e15b.h | 130 #define MUX_PA15H_GCLK_IO1 _L_(7) macro 131 #define PINMUX_PA15H_GCLK_IO1 ((PIN_PA15H_GCLK_IO1 << 16) | MUX_PA15H_GCLK_IO1)
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D | saml21e16b.h | 130 #define MUX_PA15H_GCLK_IO1 _L_(7) macro 131 #define PINMUX_PA15H_GCLK_IO1 ((PIN_PA15H_GCLK_IO1 << 16) | MUX_PA15H_GCLK_IO1)
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D | saml21e17b.h | 130 #define MUX_PA15H_GCLK_IO1 _L_(7) macro 131 #define PINMUX_PA15H_GCLK_IO1 ((PIN_PA15H_GCLK_IO1 << 16) | MUX_PA15H_GCLK_IO1)
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