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Searched refs:MUX_PA15H_GCLK_IO1 (Results 1 – 25 of 88) sorted by relevance

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/hal_atmel-3.5.0-3.4.0/asf/sam0/include/samd20/pio/
Dsamd20e18.h103 #define MUX_PA15H_GCLK_IO1 _L_(7) macro
104 #define PINMUX_PA15H_GCLK_IO1 ((PIN_PA15H_GCLK_IO1 << 16) | MUX_PA15H_GCLK_IO1)
Dsamd20e15.h103 #define MUX_PA15H_GCLK_IO1 _L_(7) macro
104 #define PINMUX_PA15H_GCLK_IO1 ((PIN_PA15H_GCLK_IO1 << 16) | MUX_PA15H_GCLK_IO1)
Dsamd20e16.h103 #define MUX_PA15H_GCLK_IO1 _L_(7) macro
104 #define PINMUX_PA15H_GCLK_IO1 ((PIN_PA15H_GCLK_IO1 << 16) | MUX_PA15H_GCLK_IO1)
Dsamd20e17.h103 #define MUX_PA15H_GCLK_IO1 _L_(7) macro
104 #define PINMUX_PA15H_GCLK_IO1 ((PIN_PA15H_GCLK_IO1 << 16) | MUX_PA15H_GCLK_IO1)
Dsamd20e14.h103 #define MUX_PA15H_GCLK_IO1 _L_(7) macro
104 #define PINMUX_PA15H_GCLK_IO1 ((PIN_PA15H_GCLK_IO1 << 16) | MUX_PA15H_GCLK_IO1)
Dsamd20g18u.h121 #define MUX_PA15H_GCLK_IO1 _L_(7) macro
122 #define PINMUX_PA15H_GCLK_IO1 ((PIN_PA15H_GCLK_IO1 << 16) | MUX_PA15H_GCLK_IO1)
Dsamd20g17u.h121 #define MUX_PA15H_GCLK_IO1 _L_(7) macro
122 #define PINMUX_PA15H_GCLK_IO1 ((PIN_PA15H_GCLK_IO1 << 16) | MUX_PA15H_GCLK_IO1)
Dsamd20g14.h135 #define MUX_PA15H_GCLK_IO1 _L_(7) macro
136 #define PINMUX_PA15H_GCLK_IO1 ((PIN_PA15H_GCLK_IO1 << 16) | MUX_PA15H_GCLK_IO1)
Dsamd20g15.h135 #define MUX_PA15H_GCLK_IO1 _L_(7) macro
136 #define PINMUX_PA15H_GCLK_IO1 ((PIN_PA15H_GCLK_IO1 << 16) | MUX_PA15H_GCLK_IO1)
Dsamd20g16.h135 #define MUX_PA15H_GCLK_IO1 _L_(7) macro
136 #define PINMUX_PA15H_GCLK_IO1 ((PIN_PA15H_GCLK_IO1 << 16) | MUX_PA15H_GCLK_IO1)
Dsamd20g17.h135 #define MUX_PA15H_GCLK_IO1 _L_(7) macro
136 #define PINMUX_PA15H_GCLK_IO1 ((PIN_PA15H_GCLK_IO1 << 16) | MUX_PA15H_GCLK_IO1)
/hal_atmel-3.5.0-3.4.0/asf/sam0/include/samd21/pio/
Dsamd21e18a.h102 #define MUX_PA15H_GCLK_IO1 _L_(7) macro
103 #define PINMUX_PA15H_GCLK_IO1 ((PIN_PA15H_GCLK_IO1 << 16) | MUX_PA15H_GCLK_IO1)
Dsamd21e15a.h102 #define MUX_PA15H_GCLK_IO1 _L_(7) macro
103 #define PINMUX_PA15H_GCLK_IO1 ((PIN_PA15H_GCLK_IO1 << 16) | MUX_PA15H_GCLK_IO1)
Dsamd21e16a.h102 #define MUX_PA15H_GCLK_IO1 _L_(7) macro
103 #define PINMUX_PA15H_GCLK_IO1 ((PIN_PA15H_GCLK_IO1 << 16) | MUX_PA15H_GCLK_IO1)
Dsamd21e17a.h102 #define MUX_PA15H_GCLK_IO1 _L_(7) macro
103 #define PINMUX_PA15H_GCLK_IO1 ((PIN_PA15H_GCLK_IO1 << 16) | MUX_PA15H_GCLK_IO1)
/hal_atmel-3.5.0-3.4.0/asf/sam0/include/samr21/pio/
Dsamr21e16a.h120 #define MUX_PA15H_GCLK_IO1 _L_(7) macro
121 #define PINMUX_PA15H_GCLK_IO1 ((PIN_PA15H_GCLK_IO1 << 16) | MUX_PA15H_GCLK_IO1)
Dsamr21e17a.h120 #define MUX_PA15H_GCLK_IO1 _L_(7) macro
121 #define PINMUX_PA15H_GCLK_IO1 ((PIN_PA15H_GCLK_IO1 << 16) | MUX_PA15H_GCLK_IO1)
Dsamr21e18a.h120 #define MUX_PA15H_GCLK_IO1 _L_(7) macro
121 #define PINMUX_PA15H_GCLK_IO1 ((PIN_PA15H_GCLK_IO1 << 16) | MUX_PA15H_GCLK_IO1)
/hal_atmel-3.5.0-3.4.0/asf/sam0/include/samc20/pio/
Dsamc20e15a.h160 #define MUX_PA15H_GCLK_IO1 _L_(7) macro
161 #define PINMUX_PA15H_GCLK_IO1 ((PIN_PA15H_GCLK_IO1 << 16) | MUX_PA15H_GCLK_IO1)
Dsamc20e16a.h160 #define MUX_PA15H_GCLK_IO1 _L_(7) macro
161 #define PINMUX_PA15H_GCLK_IO1 ((PIN_PA15H_GCLK_IO1 << 16) | MUX_PA15H_GCLK_IO1)
Dsamc20e17a.h160 #define MUX_PA15H_GCLK_IO1 _L_(7) macro
161 #define PINMUX_PA15H_GCLK_IO1 ((PIN_PA15H_GCLK_IO1 << 16) | MUX_PA15H_GCLK_IO1)
Dsamc20e18a.h160 #define MUX_PA15H_GCLK_IO1 _L_(7) macro
161 #define PINMUX_PA15H_GCLK_IO1 ((PIN_PA15H_GCLK_IO1 << 16) | MUX_PA15H_GCLK_IO1)
/hal_atmel-3.5.0-3.4.0/asf/sam0/include/saml21/pio/
Dsaml21e15b.h130 #define MUX_PA15H_GCLK_IO1 _L_(7) macro
131 #define PINMUX_PA15H_GCLK_IO1 ((PIN_PA15H_GCLK_IO1 << 16) | MUX_PA15H_GCLK_IO1)
Dsaml21e16b.h130 #define MUX_PA15H_GCLK_IO1 _L_(7) macro
131 #define PINMUX_PA15H_GCLK_IO1 ((PIN_PA15H_GCLK_IO1 << 16) | MUX_PA15H_GCLK_IO1)
Dsaml21e17b.h130 #define MUX_PA15H_GCLK_IO1 _L_(7) macro
131 #define PINMUX_PA15H_GCLK_IO1 ((PIN_PA15H_GCLK_IO1 << 16) | MUX_PA15H_GCLK_IO1)

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