| /Zephyr-latest/subsys/dsp/ |
| D | Kconfig | 4 menuconfig DSP config
5 bool "DSP subsystem"
7 Include the DSP (Digital Signal Processing) subsystem as a part of the
11 if DSP
23 prompt "DSP library backend selection"
29 bool "Use the CMSIS-DSP library as the math backend"
33 Implement the various zephyr DSP functions using the CMSIS-DSP library. This feature
37 bool "Do not use any Zephyr backends for DSP"
39 Rely on the application to provide a custom DSP backend. The implementation should be
50 Implement the various zephyr DSP functions using the MWDT-DSP library. This feature
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| /Zephyr-latest/arch/arc/core/dsp/ |
| D | Kconfig | 1 # Digital Signal Processing (DSP) configuration options
6 menu "ARC DSP Options"
10 bool "digital signal processing (DSP)"
12 This option enables DSP and DSP instructions.
15 bool "Turn off DSP if it presents"
18 This option disables DSP block via resetting DSP_CRTL register.
21 bool "DSP register sharing"
25 This option enables preservation of the hardware DSP registers
27 DSP operations.
30 bool "ARC complex DSP operation"
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| /Zephyr-latest/drivers/counter/ |
| D | Kconfig.ace | 6 bool "DSP ART Wall Clock for ACE V1X"
10 DSP ART Wall Clock used by ACE V1X.
13 bool "DSP RTC Wall Clock for ACE V1X"
17 DSP RTC Wall Clock used by ACE V1X.
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| /Zephyr-latest/soc/xlnx/zynq7000/xc7zxxx/ |
| D | Kconfig.soc | 21 28k logic cells, 2.1Mb block RAM, 800 DSP slices, up to 100 I/O pins.
28 74k logic cells, 3.3Mb block RAM, 160 DSP slices, up to 150 I/O pins,
36 85k logic cells, 4.9Mb block RAM, 220 DSP slices, up to 200 I/O pins.
43 125k logic cells, 9.3Mb block RAM, 400 DSP slices, up to 250 I/O pins,
51 275k logic cells, 17.6Mb block RAM, 900 DSP slices, up to 362 I/O pins,
59 350k logic cells, 19.1Mb block RAM, 900 DSP slices, up to 362 I/O pins,
67 444k logic cells, 26.5Mb block RAM, 2020 DSP slices, up to 400 I/O pins,
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| /Zephyr-latest/samples/modules/cmsis_dsp/moving_average/ |
| D | README.rst | 2 :name: CMSIS-DSP moving average
4 Use the CMSIS-DSP library to calculate the moving average of a signal.
9 This sample demonstrates how to use the CMSIS-DSP library to calculate the moving average of a
12 It can be run on any board supported in Zephyr, but note that CMSIS-DSP is specifically optimized
21 CMSIS-DSP function, and displayed on the console.
24 In order to allow an easy comparison of the efficiency of the CMSIS-DSP library when used on ARM
31 CMSIS-DSP is an optional module and needs to be added explicitly to your Zephyr workspace:
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| /Zephyr-latest/samples/modules/cmsis_dsp/ |
| D | cmsis_dsp.rst | 2 :name: CMSIS-DSP
5 These samples demonstrate how to use the CMSIS-DSP module to perform signal processing operations
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| /Zephyr-latest/soc/nxp/imx/imx8ulp/ |
| D | Kconfig | 16 # note: the NXP HAL refers to the HIFI4 DSP as
17 # `dsp1` and the Fusion DSP as `dsp0`, thus the
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| /Zephyr-latest/drivers/mm/ |
| D | Kconfig | 31 bool "Intel Audio DSP TLB Driver for Meteor Lake"
37 Intel Audio DSP hardware (Meteor Lake).
40 bool "Intel Audio DSP TLB Driver"
45 Intel Audio DSP hardware.
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| /Zephyr-latest/boards/nxp/mimxrt700_evk/doc/ |
| D | index.rst | 10 Cadence® Tensilica® HiFi 4 DSP for more demanding DSP and audio processing tasks.
12 HiFi 1 DSP. This removes the need for an external sensor hub, reducing system design complexity,
15 The HiFi4 is a high performance DSP core based upon a Very Long Instruction Word (VLIW) architectur…
28 - HiFi 4 DSP up to 325 MHz
32 - HiFi 1 DSP up to 250 MHz
41 - EZH-V using RISC-V core with additional SIMD/DSP instructions
145 HiFi1 DSP Core
148 One can build a Zephyr application for the i.MX RT700 HiFi 1 DSP core by targeting the HiFi 1
149 SOC. Xtensa toolchain supporting RT700 DSP cores is included in Zephyr SDK.
151 To build the hello_world sample for the i.MX RT700 HiFi 1 DSP core:
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| /Zephyr-latest/soc/xlnx/zynq7000/xc7zxxxs/ |
| D | Kconfig.soc | 21 23k logic cells, 1.8 Mb block RAM, 60 DSP slices, up to 100 I/O pins.
28 55k logic cells, 2.5Mb block RAM, 120 DSP slices, up to 150 I/O pins,
36 65k logic cells, 3.8Mb block RAM, 170 DSP slices, up to 200 I/O pins.
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| /Zephyr-latest/samples/boards/nxp/adsp/number_crunching/ |
| D | README.rst | 34 - :file:`cmsis_dsp_wrapper.c`: calls the exact math functions from CMSIS-DSP if :kconfig:option:`CO…
42 CMSIS-DSP is an optional module and needs to be added explicitly to your Zephyr workspace:
55 To build the sample with ``west`` for the ``imx8mp_evk/mimx8ml8/adsp``, which is the HiFi4 DSP core
64 An output example, for CMSIS-DSP is:
73 [Backend] CMSIS-DSP module
78 [Backend] CMSIS-DSP module
83 [Backend] CMSIS-DSP module
88 [Backend] CMSIS-DSP module
93 [Backend] CMSIS-DSP module
98 [Backend] CMSIS-DSP module
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| /Zephyr-latest/soc/nxp/imxrt/imxrt7xx/ |
| D | Kconfig.soc | 30 NXP i.MXRT7xx HiFi4 DSP Core
36 NXP i.MXRT7xx HiFi1 DSP Core
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| /Zephyr-latest/boards/mediatek/mt8195/ |
| D | Kconfig.mt8195 | 7 Board with Mediatek MT8195 Audio DSP
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| /Zephyr-latest/boards/amd/acp_6_0_adsp/ |
| D | acp_6_0_adsp.dts | 12 model = "AMD ACP_6_0 Audio DSP";
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| /Zephyr-latest/boards/nxp/mimxrt700_evk/ |
| D | mimxrt700_evk_mimxrt798s_hifi1.dts | 12 model = "NXP MIMXRT700-EVK HiFi1 DSP";
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| D | mimxrt700_evk_mimxrt798s_hifi4.dts | 12 model = "NXP MIMXRT700-EVK HiFi4 DSP";
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| /Zephyr-latest/boards/telink/tlsr9518adk80d/ |
| D | tlsr9518adk80d_defconfig | 12 # HW DSP options
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| /Zephyr-latest/drivers/timer/ |
| D | Kconfig.cavs | 18 bool "Intel Audio DSP timer"
26 The DSP wall clock timer is a timer driven directly by
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| D | Kconfig.mtk_adsp | 5 bool "MediaTek Audio DSP timer"
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| /Zephyr-latest/drivers/interrupt_controller/ |
| D | Kconfig.mtk_adsp | 5 bool "MediaTek Audio DSP Interrupt Controller"
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| /Zephyr-latest/soc/andestech/ae350/ |
| D | Kconfig | 67 bool "AndeStar V5 DSP ISA"
71 This option enables the AndeStar v5 hardware DSP, in order to
72 support using the DSP instructions.
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| /Zephyr-latest/tests/arch/arc/arc_dsp_sharing/ |
| D | README.txt | 1 Title: Shared DSP Support
15 The demonstration utilizes semaphores, round robin scheduling, DSP and XY
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| /Zephyr-latest/boards/nxp/imx8ulp_evk/ |
| D | imx8ulp_evk_mimx8ud7_adsp.dts | 13 model = "NXP i.MX 8ULP Audio DSP";
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| /Zephyr-latest/boards/nxp/imx8qm_mek/ |
| D | imx8qm_mek_mimx8qm6_adsp.dts | 13 model = "NXP i.MX 8QM Audio DSP";
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| /Zephyr-latest/boards/nxp/imx8qxp_mek/ |
| D | imx8qxp_mek_mimx8qx6_adsp.dts | 13 model = "NXP i.MX 8QXP Audio DSP";
|
