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Searched refs:aligned (Results 1 – 23 of 23) sorted by relevance

/cmsis-dsp-latest/dsppp/Include/dsppp/
Dmemory_pool.hpp101 void *aligned = in aligned_malloc() local
106 *(static_cast<void**>(aligned) - 1) = ptr; in aligned_malloc()
107 return(aligned); in aligned_malloc()
Darch_detection.hpp50 #define __ALIGNED(x) __attribute__((aligned(x)))
56 #define __ALIGNED(x) __attribute__((aligned(x)))
/cmsis-dsp-latest/Testing/FrameworkSource/
DArrayMemory.cpp34 ArrayMemory::ArrayMemory(char* ptr, size_t bufferLength,int aligned, bool tail) in ArrayMemory() argument
38 this->alignSize = aligned; in ArrayMemory()
/cmsis-dsp-latest/Examples/cmsis_build/RTE/Device/SSE-300-MPS3/
Dfvp_sse300_mps3_s.sct30 * a separate 32 bytes aligned region so that the SAU can programmed to just
41 * This dummy region ensures that the next one will be aligned on a 32 bytes
/cmsis-dsp-latest/Testing/cmsis_build/RTE/Device/SSE-300-MPS3/
Dfvp_sse300_mps3_s.sct30 * a separate 32 bytes aligned region so that the SAU can programmed to just
41 * This dummy region ensures that the next one will be aligned on a 32 bytes
Dlinker_SSE300MPS3_secure.ld105 * separate 32 bytes aligned region so that the SAU can programmed to just set
/cmsis-dsp-latest/Testing/cmsis_build/RTE/Device/SSE-310-MPS3/
Dcorstone310_mps3_s.sct30 * a separate 32 bytes aligned region so that the SAU can programmed to just
41 * This dummy region ensures that the next one will be aligned on a 32 bytes
/cmsis-dsp-latest/Testing/FrameworkInclude/
DArrayMemory.h42 ArrayMemory(char* ptr, size_t bufferLength,int aligned, bool tail);
/cmsis-dsp-latest/dsppp/linker_scripts/
Dac6_sse300_mps3_s.sct31 * a separate 32 bytes aligned region so that the SAU can programmed to just
42 * This dummy region ensures that the next one will be aligned on a 32 bytes
/cmsis-dsp-latest/Testing/cmsis_build/linker_scripts/
Dac6_sse300_mps3_s.sct31 * a separate 32 bytes aligned region so that the SAU can programmed to just
42 * This dummy region ensures that the next one will be aligned on a 32 bytes
/cmsis-dsp-latest/Include/
Darm_math_types.h93 #define __ALIGNED(x) __attribute__((aligned(x)))
99 #define __ALIGNED(x) __attribute__((aligned(x)))
Darm_math_memory.h55 #define __SIMD32_TYPE __un(aligned) int32_t
/cmsis-dsp-latest/Testing/cmsis_build/RTE/Device/ARMCM0P/
Dgcc_arm.ld182 * Location counter can end up 2byte aligned with narrow Thumb code but
184 * which must be 4byte aligned
/cmsis-dsp-latest/Testing/cmsis_build/RTE/Device/ARMCM3/
Dgcc_arm.ld182 * Location counter can end up 2byte aligned with narrow Thumb code but
184 * which must be 4byte aligned
/cmsis-dsp-latest/Testing/cmsis_build/RTE/Device/ARMCM4_FP/
Dgcc_arm.ld182 * Location counter can end up 2byte aligned with narrow Thumb code but
184 * which must be 4byte aligned
/cmsis-dsp-latest/Testing/cmsis_build/RTE/Device/ARMCM7_DP/
Dgcc_arm.ld182 * Location counter can end up 2byte aligned with narrow Thumb code but
184 * which must be 4byte aligned
/cmsis-dsp-latest/Testing/cmsis_build/RTE/Device/ARMCM23/
Dgcc_arm.ld189 * Location counter can end up 2byte aligned with narrow Thumb code but
191 * which must be 4byte aligned
/cmsis-dsp-latest/Testing/cmsis_build/RTE/Device/ARMCM33_DSP_FP/
Dgcc_arm.ld189 * Location counter can end up 2byte aligned with narrow Thumb code but
191 * which must be 4byte aligned
/cmsis-dsp-latest/Testing/cmsis_build/RTE/Device/ARMCM55/
Dgcc_arm.ld189 * Location counter can end up 2byte aligned with narrow Thumb code but
191 * which must be 4byte aligned
/cmsis-dsp-latest/Documentation/Doxygen/src/
Dmemory_allocator.md55 …t will be then used for the memory allocations. The memory pools are also creating aligned buffers.
/cmsis-dsp-latest/dsppp/RTE/Device/SSE-300-MPS3/
Dlinker_SSE300MPS3_secure.ld105 * separate 32 bytes aligned region so that the SAU can programmed to just set
Dlinker_SSE300MPS3_secure.ld.base@1.0.0105 * separate 32 bytes aligned region so that the SAU can programmed to just set
/cmsis-dsp-latest/
DREADME.md207 #define __ALIGNED(x) __attribute__((aligned(x)))