/Zephyr-latest/drivers/ptp_clock/ |
D | ptp_clock_nxp_enet.c | 94 double ratio) in ptp_clock_nxp_enet_rate_adjust() argument 108 if ((ratio > 1.0 && ratio - 1.0 < 0.00000001) || in ptp_clock_nxp_enet_rate_adjust() 109 (ratio < 1.0 && 1.0 - ratio < 0.00000001)) { in ptp_clock_nxp_enet_rate_adjust() 113 ratio *= data->clock_ratio; in ptp_clock_nxp_enet_rate_adjust() 116 if ((ratio > 1.0 + 1.0/(2 * hw_inc)) || in ptp_clock_nxp_enet_rate_adjust() 117 (ratio < 1.0 - 1.0/(2 * hw_inc))) { in ptp_clock_nxp_enet_rate_adjust() 122 data->clock_ratio = ratio; in ptp_clock_nxp_enet_rate_adjust() 124 if (ratio < 1.0) { in ptp_clock_nxp_enet_rate_adjust() 126 val = 1.0 / (hw_inc * (1.0 - ratio)); in ptp_clock_nxp_enet_rate_adjust() 127 } else if (ratio > 1.0) { in ptp_clock_nxp_enet_rate_adjust() [all …]
|
/Zephyr-latest/drivers/sensor/ams/tsl2561/ |
D | tsl2561.c | 204 uint32_t ratio = (ratio1 + 1) >> 1; in tsl2561_channel_get() local 209 if (ratio <= TSL2561_LUX_K1T) { in tsl2561_channel_get() 212 } else if (ratio <= TSL2561_LUX_K2T) { in tsl2561_channel_get() 215 } else if (ratio <= TSL2561_LUX_K3T) { in tsl2561_channel_get() 218 } else if (ratio <= TSL2561_LUX_K4T) { in tsl2561_channel_get() 221 } else if (ratio <= TSL2561_LUX_K5T) { in tsl2561_channel_get() 224 } else if (ratio <= TSL2561_LUX_K6T) { in tsl2561_channel_get() 227 } else if (ratio <= TSL2561_LUX_K7T) { in tsl2561_channel_get() 230 } else if (ratio > TSL2561_LUX_K8T) { in tsl2561_channel_get()
|
/Zephyr-latest/drivers/net/ |
D | loopback.c | 82 int loopback_set_packet_drop_ratio(float ratio) in loopback_set_packet_drop_ratio() argument 84 if (ratio < 0.0f || ratio > 1.0f) { in loopback_set_packet_drop_ratio() 87 loopback_packet_drop_ratio = ratio; in loopback_set_packet_drop_ratio()
|
/Zephyr-latest/drivers/audio/ |
D | dmic_nrfx_pdm.c | 141 uint8_t ratio, in is_better() argument 147 uint32_t act_rate = freq / ratio; in is_better() 151 LOG_DBG("Freq %u, ratio %u, act_rate %u", freq, ratio, act_rate); in is_better() 166 uint8_t ratio, in check_pdm_frequencies() argument 176 uint32_t req_freq = req_rate * ratio; in check_pdm_frequencies() 181 is_better(act_freq, ratio, req_rate, best_diff, best_rate, best_freq)) { in check_pdm_frequencies() 199 is_better(act_freq, ratio, req_rate, best_diff, best_rate, best_freq)) { in check_pdm_frequencies() 224 uint32_t req_freq = req_rate * ratio; in check_pdm_frequencies() 236 is_better(act_freq, ratio, req_rate, best_diff, best_rate, best_freq)) { in check_pdm_frequencies() 270 if (is_better(freq_val, ratio, req_rate, in check_pdm_frequencies() [all …]
|
/Zephyr-latest/drivers/ethernet/ |
D | eth_e1000.c | 364 static int ptp_clock_e1000_rate_adjust(const struct device *dev, double ratio) in ptp_clock_e1000_rate_adjust() argument 374 if (ratio == 1.0) { in ptp_clock_e1000_rate_adjust() 378 ratio *= context->clk_ratio; in ptp_clock_e1000_rate_adjust() 381 if ((ratio > 1.0 + 1.0/(2.0 * hw_inc)) || in ptp_clock_e1000_rate_adjust() 382 (ratio < 1.0 - 1.0/(2.0 * hw_inc))) { in ptp_clock_e1000_rate_adjust() 387 context->clk_ratio = ratio; in ptp_clock_e1000_rate_adjust() 389 if (ratio < 1.0) { in ptp_clock_e1000_rate_adjust() 391 val = 1.0 / (hw_inc * (1.0 - ratio)); in ptp_clock_e1000_rate_adjust() 392 } else if (ratio > 1.0) { in ptp_clock_e1000_rate_adjust() 394 val = 1.0 / (hw_inc * (ratio - 1.0)); in ptp_clock_e1000_rate_adjust()
|
/Zephyr-latest/drivers/sensor/st/stm32_vbat/ |
D | stm32_vbat.c | 34 int ratio; member 90 voltage = data->raw * adc_ref_internal(data->adc) * cfg->ratio / 0x0FFF; in stm32_vbat_channel_get() 148 .ratio = DT_INST_PROP(inst, ratio), \
|
/Zephyr-latest/drivers/adc/ |
D | Kconfig.mcux | 63 bool "Divide ratio is 1" 66 bool "Divide ratio is 2" 69 bool "Divide ratio is 4" 72 bool "Divide ratio is 8"
|
/Zephyr-latest/include/zephyr/net/ |
D | loopback.h | 26 int loopback_set_packet_drop_ratio(float ratio);
|
/Zephyr-latest/drivers/clock_control/ |
D | clock_control_nrf_auxpll.c | 74 uint8_t ratio; in clock_control_nrf_auxpll_get_rate() local 78 ratio = nrf_auxpll_static_ratio_get(config->auxpll); in clock_control_nrf_auxpll_get_rate() 80 *rate = (ratio * config->ref_clk_hz + in clock_control_nrf_auxpll_get_rate()
|
/Zephyr-latest/scripts/tests/twister_blackbox/ |
D | test_shuffle.py | 53 def test_shuffle_tests(self, out_path, seed, ratio, expected_order): argument 58 ['--subset', ratio] + \
|
/Zephyr-latest/boards/shields/lcd_par_s035/boards/ |
D | rd_rw612_bga.overlay | 97 /* Raise the timer0 ratio to enable longer reset delay */ 98 nxp,timer0-ratio = <15>; 99 /* Lower timer1 ratio to enable shorter TE delay */ 100 nxp,timer1-ratio = <0>;
|
/Zephyr-latest/samples/subsys/input/draw_touch_events/ |
D | Kconfig | 5 int "Screen width to cross horizontal/vertical dimension ratio"
|
/Zephyr-latest/drivers/watchdog/ |
D | wdt_cc32xx.c | 43 static const uint32_t ratio = CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC / 1000; in wdt_cc32xx_msToTicks() local 44 static const uint32_t maxMs = MAX_RELOAD_VALUE / ratio; in wdt_cc32xx_msToTicks() 50 return ms * ratio; in wdt_cc32xx_msToTicks()
|
/Zephyr-latest/boards/shields/adafruit_2_8_tft_touch_v2/boards/ |
D | rd_rw612_bga.overlay | 25 /* Set timer0 ratio to enable longer resets */ 26 nxp,timer0-ratio = <15>;
|
/Zephyr-latest/scripts/native_simulator/native/src/include/ |
D | nsi_timer_model.h | 27 void hwtimer_set_rt_ratio(double ratio);
|
/Zephyr-latest/boards/native/native_posix/ |
D | timer_model.h | 28 void hwtimer_set_rt_ratio(double ratio);
|
/Zephyr-latest/boards/shields/ssd1306/ |
D | sh1106_128x64.overlay | 24 multiplex-ratio = <63>;
|
D | ssd1306_128x64.overlay | 24 multiplex-ratio = <63>;
|
D | ssd1306_128x32.overlay | 24 multiplex-ratio = <31>;
|
D | ssd1306_128x64_spi.overlay | 25 multiplex-ratio = <63>;
|
/Zephyr-latest/drivers/timer/ |
D | Kconfig.riscv_machine | 28 Specifies the division ratio of the system clock supplied to the Machine Timer. 37 The division ratio should define in devicetree,
|
/Zephyr-latest/include/zephyr/drivers/ |
D | ptp_clock.h | 29 int (*rate_adjust)(const struct device *dev, double ratio);
|
/Zephyr-latest/soc/nuvoton/npcx/ |
D | Kconfig | 103 prompt "Core clock to SPI flash clock ratio" 106 This sets the clock ratio (core clock / SPI clock) 109 bool "NPCX SPI clock ratio 1" 114 bool "NPCX SPI clock ratio 2"
|
/Zephyr-latest/boards/nxp/rd_rw612_bga/dts/ |
D | goworld_16880_lcm.overlay | 20 /* Raise the timer0 ratio to enable longer reset delay */ 21 nxp,timer0-ratio = <15>;
|
/Zephyr-latest/drivers/ethernet/nxp_enet/ |
D | eth_mcux.c | 1662 static int ptp_clock_mcux_rate_adjust(const struct device *dev, double ratio) in ptp_clock_mcux_rate_adjust() argument 1672 if ((ratio > 1.0 && ratio - 1.0 < 0.00000001) || in ptp_clock_mcux_rate_adjust() 1673 (ratio < 1.0 && 1.0 - ratio < 0.00000001)) { in ptp_clock_mcux_rate_adjust() 1677 ratio *= context->clk_ratio; in ptp_clock_mcux_rate_adjust() 1680 if ((ratio > 1.0 + 1.0/(2 * hw_inc)) || in ptp_clock_mcux_rate_adjust() 1681 (ratio < 1.0 - 1.0/(2 * hw_inc))) { in ptp_clock_mcux_rate_adjust() 1686 context->clk_ratio = ratio; in ptp_clock_mcux_rate_adjust() 1688 if (ratio < 1.0) { in ptp_clock_mcux_rate_adjust() 1690 val = 1.0 / (hw_inc * (1.0 - ratio)); in ptp_clock_mcux_rate_adjust() 1691 } else if (ratio > 1.0) { in ptp_clock_mcux_rate_adjust() [all …]
|