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Searched refs:phase_seg2 (Results 1 – 22 of 22) sorted by relevance

/Zephyr-latest/drivers/can/
Dcan_common.c165 tseg2 = CLAMP(tseg2, min->phase_seg2, max->phase_seg2); in update_sample_pnt()
174 if (tseg2 > max->phase_seg2) { in update_sample_pnt()
182 if (tseg2 < min->phase_seg2) { in update_sample_pnt()
187 res->phase_seg2 = tseg2; in update_sample_pnt()
255 uint32_t total_tq = CAN_SYNC_SEG + max->prop_seg + max->phase_seg1 + max->phase_seg2; in can_calc_timing_internal()
297 res->phase_seg2 = tmp_res.phase_seg2; in can_calc_timing_internal()
312 res->sjw = MIN(res->phase_seg1, res->phase_seg2 / 2); in can_calc_timing_internal()
353 !IN_RANGE(timing->phase_seg2, min->phase_seg2, max->phase_seg2) || in check_timing_in_range()
358 if ((timing->sjw > timing->phase_seg1) || (timing->sjw > timing->phase_seg2)) { in check_timing_in_range()
Dcan_fake.c127 .phase_seg2 = 2,
134 .phase_seg2 = 128,
144 .phase_seg2 = 1,
151 .phase_seg2 = 16,
Dcan_loopback.c386 .phase_seg2 = 2,
393 .phase_seg2 = 128,
403 .phase_seg2 = 1,
410 .phase_seg2 = 16,
Dcan_mcux_flexcan.c296 timing.phaseSeg2 = data->timing.phase_seg2 - 1U; in mcux_flexcan_start()
305 timing.fphaseSeg2 = data->timing_data.phase_seg2 - 1U; in mcux_flexcan_start()
1156 data->timing.phase_seg2); in mcux_flexcan_init()
1177 data->timing_data.phase_seg2); in mcux_flexcan_init()
1206 data->timing.phase_seg2) / data->timing.prescaler; in mcux_flexcan_init()
1212 data->timing_data.phase_seg2) / data->timing_data.prescaler; in mcux_flexcan_init()
1225 flexcan_config.timingConfig.phaseSeg2 = data->timing.phase_seg2 - 1U; in mcux_flexcan_init()
1232 flexcan_config.timingConfig.fphaseSeg2 = data->timing_data.phase_seg2 - 1U; in mcux_flexcan_init()
1289 .phase_seg2 = 0x02,
1296 .phase_seg2 = 0x08,
[all …]
Dcan_shell.c401 timing_min->phase_seg2, timing_max->phase_seg2, in cmd_can_show()
413 timing_min->phase_seg2, timing_max->phase_seg2, in cmd_can_show()
485 timing.sjw, timing.prop_seg, timing.phase_seg1, timing.phase_seg2, in cmd_can_bitrate_set()
556 timing.sjw, timing.prop_seg, timing.phase_seg1, timing.phase_seg2, in cmd_can_dbitrate_set()
600 timing->phase_seg2 = (uint32_t)strtoul(argv[5], &endptr, 10); in can_shell_parse_timing()
633 timing.phase_seg2, timing.prescaler); in cmd_can_timing_set()
662 timing.phase_seg2, timing.prescaler); in cmd_can_dtiming_set()
Dcan_native_linux.c419 .phase_seg2 = 0x01,
426 .phase_seg2 = 0x0F,
435 .phase_seg2 = 0x01,
442 .phase_seg2 = 0x0F,
Dcan_esp32_twai.c133 TWAI_TIME_SEG2_PREP(timing->phase_seg2 - 1); in can_esp32_twai_set_timing()
248 .phase_seg2 = 0x8,
Dcan_mcp251xfd.c426 tmp |= FIELD_PREP(MCP251XFD_REG_NBTCFG_TSEG2_MASK, timing->phase_seg2 - 1); in mcp251xfd_set_timing()
464 tmp |= FIELD_PREP(MCP251XFD_REG_DBTCFG_TSEG2_MASK, timing->phase_seg2 - 1); in mcp251xfd_set_timing_data()
1587 timing.phase_seg2); in mcp251xfd_init()
1599 timing_data.phase_seg1, timing_data.phase_seg2); in mcp251xfd_init()
1705 .phase_seg2 = 1,
1712 .phase_seg2 = 128,
1720 .phase_seg2 = 1,
1727 .phase_seg2 = 16,
Dcan_nxp_s32_canxl.c692 timing->prop_seg, timing->phase_seg1, timing->phase_seg2, in nxp_s32_zcan_timing_to_canxl_timing()
697 canxl_timing->phaseSeg2 = timing->phase_seg2 - 1U; in nxp_s32_zcan_timing_to_canxl_timing()
1103 .phase_seg2 = 0x02,
1110 .phase_seg2 = 0x08,
1119 .phase_seg2 = 0x02,
1126 .phase_seg2 = 0x08,
Dcan_renesas_ra.c24 .phase_seg2 = 128, \
33 .phase_seg2 = 2, \
43 .phase_seg2 = 16, \
51 .phase_seg2 = 2, \
197 .time_segment_2 = z_timing->phase_seg2, in set_hw_timing_configuration()
Dcan_mcp2515.c355 const uint8_t phseg2 = (timing->phase_seg2 - 1); in mcp2515_set_timing()
897 .phase_seg2 = 0x02,
904 .phase_seg2 = 0x08,
983 timing.prescaler, timing.phase_seg1, timing.phase_seg2); in mcp2515_init()
Dcan_xmc4xxx.c134 reg |= FIELD_PREP(CAN_NODE_NBTR_TSEG2_Msk, timing->phase_seg2 - 1); in can_xmc4xxx_set_timing()
879 timing.phase_seg2); in can_xmc4xxx_init()
902 .phase_seg2 = 2,
909 .phase_seg2 = 8,
Dcan_rcar.c731 RCAR_CAN_BCR_TSEG2(timing->phase_seg2 - 1); in can_rcar_set_bittiming()
1086 timing.prescaler, timing.phase_seg1, timing.phase_seg2); in can_rcar_init()
1173 .phase_seg2 = 0x02,
1180 .phase_seg2 = 0x08,
Dcan_stm32_bxcan.c557 (((timing->phase_seg2 - 1) << CAN_BTR_TS2_Pos) & CAN_BTR_TS2_Msk) | in can_stm32_set_timing()
669 timing.prescaler, timing.phase_seg1, timing.phase_seg2); in can_stm32_init()
1086 .phase_seg2 = 0x01,
1093 .phase_seg2 = 0x08,
Dcan_mcan.c211 FIELD_PREP(CAN_MCAN_NBTP_NTSEG2, timing->phase_seg2 - 1UL) | in can_mcan_set_timing()
242 FIELD_PREP(CAN_MCAN_DBTP_DTSEG2, timing_data->phase_seg2 - 1UL) | in can_mcan_set_timing_data()
1477 timing.phase_seg2); in can_mcan_init()
Dcan_sja1000.c123 CAN_SJA1000_BTR1_TSEG2_PREP(timing->phase_seg2 - 1); in can_sja1000_set_timing()
/Zephyr-latest/tests/drivers/can/timing/src/
Dmain.c78 const uint32_t ts = 1 + timing->prop_seg + timing->phase_seg1 + timing->phase_seg2; in assert_bitrate_correct()
108 zassert_true(timing->phase_seg2 <= max->phase_seg2, "phase_seg2 exceeds max"); in assert_timing_within_bounds()
114 zassert_true(timing->phase_seg2 >= min->phase_seg2, "phase_seg2 lower than min"); in assert_timing_within_bounds()
130 const uint32_t ts = 1 + timing->prop_seg + timing->phase_seg1 + timing->phase_seg2; in assert_sp_within_margin()
183 timing.sjw, timing.prop_seg, timing.phase_seg1, timing.phase_seg2, in test_timing_values()
/Zephyr-latest/include/zephyr/drivers/can/
Dcan_sja1000.h67 .phase_seg2 = 1, \
79 .phase_seg2 = 8, \
Dcan_mcan.h856 .phase_seg2 = 2, \
868 .phase_seg2 = 128, \
880 .phase_seg2 = 1, \
892 .phase_seg2 = 16, \
/Zephyr-latest/tests/drivers/can/shell/src/
Dmain.c37 zassert_equal(t1->phase_seg2, t2->phase_seg2, "phase_seg2 mismatch"); in assert_can_timing_equal()
218 .phase_seg2 = 32U, in ZTEST()
250 .phase_seg2 = 10U, in ZTEST()
/Zephyr-latest/doc/hardware/peripherals/can/
Dshell.rst79 … timing: sjw 1..128, prop_seg 0..0, phase_seg1 2..256, phase_seg2 2..128, prescaler 1..512
80 timing data: sjw 1..16, prop_seg 0..0, phase_seg1 1..32, phase_seg2 1..16, prescaler 1..32
/Zephyr-latest/include/zephyr/drivers/
Dcan.h270 uint16_t phase_seg2; member