Searched refs:mappings (Results 1 – 25 of 54) sorted by relevance
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| /Zephyr-latest/doc/kernel/memory_management/ |
| D | virtual_memory.rst | 59 * :kconfig:option:`CONFIG_KERNEL_DIRECT_MAP`: permits 1:1 mappings between
89 |..............| <- grows downward as more mappings are made
97 +--------------+ <- memory mappings start here
139 In general, most supported architectures set up the memory mappings at boot as
159 Caching modes for these mappings are architecture specific. They can be
162 Note that SoCs have their own additional mappings required to boot where
163 these mappings are defined under their own SoC configurations. These mappings
172 mappings must be aligned on page size and have finer access control.
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| /Zephyr-latest/scripts/ci/ |
| D | upload_test_results_es.py | 256 mappings = {}
260 mappings = json.load(json_map)
262 mappings = {
285 es.indices.create(index=args.index, mappings=mappings, settings=settings)
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| /Zephyr-latest/kernel/ |
| D | Kconfig.vm | 43 mappings (with potentially different permissions).
73 size of the virtual region for runtime memory mappings. This is needed
76 mappings. The kernel itself will be mapped in here as well at boot.
91 there isn't overlap with the existed mappings, it will reserve the
129 bool "Allow on-demand memory mappings"
133 When this is enabled, RAM-based memory mappings don't actually
161 all page frames via anonymous memory mappings.
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| /Zephyr-latest/snippets/xen_dom0/boards/ |
| D | rcar_salvator_xs.overlay | 31 * (XEN) Allocating 1:1 mappings for dom0:
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| D | rcar_h3ulcb_r8a77951_a57.overlay | 31 * (XEN) Allocating 1:1 mappings for dom0:
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| D | qemu_cortex_a53.overlay | 35 * (XEN) Allocating 1:1 mappings for dom0:
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| D | rcar_spider_s4_r8a779f0_a55.overlay | 33 * (XEN) Allocating 1:1 mappings for dom0:
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| /Zephyr-latest/doc/hardware/arch/ |
| D | x86.rst | 83 memory mappings. This is useful for static mappings and/or device MMIO
118 Note that specifying additional memory mappings requires larger storage
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| /Zephyr-latest/arch/xtensa/core/ |
| D | README_MMU.txt | 15 "special" ways storing mappings under OS control. Some of these are
162 top-level "L1" page containing the mappings for the page table
181 double mappings.
200 unchangable mappings from the final 384M of memory to the bottom and
203 remaining memory space would be used for virtual mappings. This
215 data, and leave any existing mappings in place in the TLB using the
234 Note, obviously, that any change of the mappings within an ASID
262 notifying another CPU of changes to page mappings beyond doing
267 page table mappings in the system are set uncached. The OS makes no
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| /Zephyr-latest/doc/connectivity/networking/api/ |
| D | traffic-class.rst | 26 See :zephyr_file:`subsys/net/ip/net_tc.c` for details of how various mappings are done.
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| /Zephyr-latest/samples/drivers/led/lp5562/ |
| D | README.rst | 28 mappings used by this sample.
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| /Zephyr-latest/boards/actinius/icarus_som_dk/ |
| D | actinius_icarus_som_dk_common.dtsi | 158 /* Include file with mappings and aliases for arduino compatibility */
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| /Zephyr-latest/boards/actinius/icarus/ |
| D | actinius_icarus_common.dtsi | 169 /* Include file with mappings and aliases for feather compatibility */
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| /Zephyr-latest/soc/mediatek/mt8xxx/ |
| D | mtk_adsp_load.py | 59 def mappings(): function
319 mmio = mappings()
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| /Zephyr-latest/arch/x86/ |
| D | gen_mmu.py | 659 mappings = []
702 mappings.append(one_map)
705 for one_map in mappings:
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| /Zephyr-latest/boards/contextualelectronics/abc/doc/ |
| D | index.rst | 91 Pins can be configured in the board pinctrl file. To see the available mappings,
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| /Zephyr-latest/boards/nxp/mimxrt685_evk/ |
| D | mimxrt685_evk-pinctrl.dtsi | 122 * If your application requires more then the mappings are as follows
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| /Zephyr-latest/doc/connectivity/networking/ |
| D | qemu_user_setup.rst | 83 * As port mappings need to be defined before launching qemu, clients which use
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| /Zephyr-latest/boards/ezurio/bl653_dvk/doc/ |
| D | bl653_dvk.rst | 171 Pins can be configured in the board pinctrl file. To see the available mappings,
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| /Zephyr-latest/soc/ite/ec/it8xxx2/ |
| D | linker.ld | 211 /* IT8xxx2 requires memory mappings be configured for execution
314 /* Claim RAM for ILM mappings; must be 4k-aligned and each mapping is 4k in
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| /Zephyr-latest/arch/x86/zefi/ |
| D | README.txt | 79 There is no protection against colliding mappings. We just assume
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| /Zephyr-latest/boards/96boards/stm32_sensor_mez/doc/ |
| D | index.rst | 110 The default USART mappings for the remaining ones are:
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| /Zephyr-latest/boards/pjrc/teensy4/doc/ |
| D | index.rst | 117 Pin mappings from Teensy to MIMXRT1062 SoC.
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| /Zephyr-latest/boards/raytac/mdbt50q_db_33/doc/ |
| D | index.rst | 150 Pins can be configured in the board pinctrl file. To see the available mappings,
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| /Zephyr-latest/boards/raytac/mdbt50q_db_40/doc/ |
| D | index.rst | 150 Pins can be configured in the board pinctrl file. To see the available mappings,
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