| /Zephyr-latest/drivers/sdhc/ |
| D | rcar_mmc.c | 326 struct sdhc_io ios; in rcar_mmc_reset() local
328 memcpy(&ios, &data->host_io, sizeof(ios)); in rcar_mmc_reset()
329 memset(&data->host_io, 0, sizeof(ios)); in rcar_mmc_reset()
331 data->host_io.power_mode = ios.power_mode; in rcar_mmc_reset()
333 ret = sdhc_set_io(dev, &ios); in rcar_mmc_reset()
339 if (can_retune && (ios.timing == SDHC_TIMING_SDR50 || in rcar_mmc_reset()
340 ios.timing == SDHC_TIMING_SDR104 || in rcar_mmc_reset()
341 ios.timing == SDHC_TIMING_HS200)) { in rcar_mmc_reset()
1018 struct sdhc_io *ios) in rcar_mmc_change_voltage() argument
1023 if (!ios->signal_voltage || ios->signal_voltage == host_io->signal_voltage) { in rcar_mmc_change_voltage()
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| D | intel_emmc_host.c | 1007 static int emmc_set_io(const struct device *dev, struct sdhc_io *ios) in emmc_set_io() argument
1014 LOG_DBG("emmc I/O: DW %d, Clk %d Hz, card power state %s, voltage %s", ios->bus_width, in emmc_set_io()
1015 ios->clock, ios->power_mode == SDHC_POWER_ON ? "ON" : "OFF", in emmc_set_io()
1016 ios->signal_voltage == SD_VOL_1_8_V ? "1.8V" : "3.3V"); in emmc_set_io()
1018 if (ios->clock && (ios->clock > emmc->props.f_max || ios->clock < emmc->props.f_min)) { in emmc_set_io()
1019 LOG_ERR("Invalid argument for clock freq: %d Support max:%d and Min:%d", ios->clock, in emmc_set_io()
1025 if (host_io->clock != ios->clock) { in emmc_set_io()
1027 if (ios->clock != 0) { in emmc_set_io()
1029 LOG_DBG("CLOCK: %d", ios->clock); in emmc_set_io()
1030 if (!emmc_clock_set(dev, ios->clock)) { in emmc_set_io()
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| D | ifx_cat1_sdio.c | 123 static int ifx_cat1_sdio_set_io(const struct device *dev, struct sdhc_io *ios) in ifx_cat1_sdio_set_io() argument
127 cyhal_sdio_cfg_t config = {.frequencyhal_hz = ios->clock}; in ifx_cat1_sdio_set_io()
134 if ((dev_data->clock_speed != ios->clock) && (ios->clock != 0)) { in ifx_cat1_sdio_set_io()
136 if ((ios->clock > IFX_CAT1_SDIO_F_MAX) || (ios->clock < IFX_CAT1_SDIO_F_MIN)) { in ifx_cat1_sdio_set_io()
145 dev_data->clock_speed = ios->clock; in ifx_cat1_sdio_set_io()
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| D | imx_usdhc.c | 289 static int imx_usdhc_set_io(const struct device *dev, struct sdhc_io *ios) in imx_usdhc_set_io() argument
297 ios->bus_width, in imx_usdhc_set_io()
298 ios->clock, in imx_usdhc_set_io()
299 ios->power_mode == SDHC_POWER_ON ? "ON" : "OFF", in imx_usdhc_set_io()
300 ios->signal_voltage == SD_VOL_1_8_V ? "1.8V" : "3.3V" in imx_usdhc_set_io()
309 if (ios->clock && (ios->clock > data->props.f_max || ios->clock < data->props.f_min)) { in imx_usdhc_set_io()
314 if (host_io->clock != ios->clock) { in imx_usdhc_set_io()
315 if (ios->clock != 0) { in imx_usdhc_set_io()
317 bus_clk = USDHC_SetSdClock(cfg->base, src_clk_hz, ios->clock); in imx_usdhc_set_io()
323 host_io->clock = ios->clock; in imx_usdhc_set_io()
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| D | mcux_sdif.c | 126 static int mcux_sdif_set_io(const struct device *dev, struct sdhc_io *ios) in mcux_sdif_set_io() argument
138 if (ios->clock != 0 && in mcux_sdif_set_io()
139 (ios->clock <= MCUX_SDIF_F_MAX) && in mcux_sdif_set_io()
140 (ios->clock >= MCUX_SDIF_F_MIN)) { in mcux_sdif_set_io()
141 bus_clk_hz = SDIF_SetCardClock(config->base, src_clk_hz, ios->clock); in mcux_sdif_set_io()
146 } else if (ios->clock != 0) { in mcux_sdif_set_io()
151 if (ios->bus_mode != SDHC_BUSMODE_PUSHPULL) { in mcux_sdif_set_io()
155 SDIF_EnableCardPower(config->base, ios->power_mode == SDHC_POWER_ON); in mcux_sdif_set_io()
157 switch (ios->bus_width) { in mcux_sdif_set_io()
171 if (ios->signal_voltage != SD_VOL_3_3_V) { in mcux_sdif_set_io()
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| D | sdhc_cdns.c | 224 static int sdhc_cdns_set_io(const struct device *dev, struct sdhc_io *ios) in sdhc_cdns_set_io() argument
229 if (host_io->bus_width != ios->bus_width || host_io->clock != in sdhc_cdns_set_io()
230 ios->clock) { in sdhc_cdns_set_io()
231 host_io->bus_width = ios->bus_width; in sdhc_cdns_set_io()
232 host_io->clock = ios->clock; in sdhc_cdns_set_io()
233 return cdns_sdmmc_ops->set_ios(ios->clock, ios->bus_width); in sdhc_cdns_set_io()
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| D | sam_hsmci.c | 115 static int sam_hsmci_set_io(const struct device *dev, struct sdhc_io *ios) in sam_hsmci_set_io() argument
124 LOG_DBG("%s(clock=%d, bus_width=%d, timing=%d, mode=%d)", __func__, ios->clock, in sam_hsmci_set_io()
125 ios->bus_width, ios->timing, ios->bus_mode); in sam_hsmci_set_io()
127 if (ios->clock > 0) { in sam_hsmci_set_io()
128 if (ios->clock > _HSMCI_MAX_FREQ) { in sam_hsmci_set_io()
141 div_val = frequency / ios->clock - 2; in sam_hsmci_set_io()
158 if (ios->bus_width) { in sam_hsmci_set_io()
161 switch (ios->bus_width) { in sam_hsmci_set_io()
173 data->open_drain = (ios->bus_mode == SDHC_BUSMODE_OPENDRAIN); in sam_hsmci_set_io()
175 if (ios->timing) { in sam_hsmci_set_io()
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| D | sdhc_spi.c | 693 static int sdhc_spi_set_io(const struct device *dev, struct sdhc_io *ios) in sdhc_spi_set_io() argument
698 if (ios->clock != data->spi_cfg->frequency) { in sdhc_spi_set_io()
699 if (ios->clock > cfg->spi_max_freq) { in sdhc_spi_set_io()
705 if (ios->clock != 0) { in sdhc_spi_set_io()
707 data->cfg_a.frequency = ios->clock; in sdhc_spi_set_io()
712 data->cfg_b.frequency = ios->clock; in sdhc_spi_set_io()
719 if (ios->bus_mode != SDHC_BUSMODE_PUSHPULL) { in sdhc_spi_set_io()
723 if (data->power_mode != ios->power_mode) { in sdhc_spi_set_io()
724 if (ios->power_mode == SDHC_POWER_ON) { in sdhc_spi_set_io()
752 data->power_mode = ios->power_mode; in sdhc_spi_set_io()
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| D | sdhc_esp32.c | 958 static int sdhc_esp32_set_io(const struct device *dev, struct sdhc_io *ios) in sdhc_esp32_set_io() argument
967 cfg->slot, ios->bus_width, ios->clock, in sdhc_esp32_set_io()
968 ios->power_mode == SDHC_POWER_ON ? "ON" : "OFF", in sdhc_esp32_set_io()
969 ios->signal_voltage == SD_VOL_1_8_V ? "1.8V" : "3.3V"); in sdhc_esp32_set_io()
971 if (ios->clock) { in sdhc_esp32_set_io()
973 if (ios->clock > cfg->props.f_max || ios->clock < cfg->props.f_min) { in sdhc_esp32_set_io()
978 if (data->bus_clock != (uint32_t)ios->clock) { in sdhc_esp32_set_io()
980 ret = sdmmc_host_set_card_clk(sdio_hw, cfg->slot, (ios->clock / 1000)); in sdhc_esp32_set_io()
983 LOG_INF("Bus clock successfully set to %d kHz", ios->clock / 1000); in sdhc_esp32_set_io()
989 data->bus_clock = (uint32_t)ios->clock; in sdhc_esp32_set_io()
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| D | sdhc_renesas_ra.c | 446 static int sdhc_ra_set_io(const struct device *dev, struct sdhc_io *ios) in sdhc_ra_set_io() argument
457 if (ios->bus_width > 0) { in sdhc_ra_set_io()
460 switch (ios->bus_width) { in sdhc_ra_set_io()
482 if (ios->clock) { in sdhc_ra_set_io()
483 if (ios->clock > priv->props.f_max || ios->clock < priv->props.f_min) { in sdhc_ra_set_io()
488 if (priv->bus_clock != (uint32_t)ios->clock) { in sdhc_ra_set_io()
489 fsp_err = r_sdhi_max_clock_rate_set(p_ctrl, ios->clock); in sdhc_ra_set_io()
494 priv->bus_clock = ios->clock; in sdhc_ra_set_io()
498 if (ios->timing > 0) { in sdhc_ra_set_io()
500 if (priv->timing != ios->timing) { in sdhc_ra_set_io()
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| /Zephyr-latest/include/zephyr/drivers/ |
| D | sdhc.h | 264 int (*set_io)(const struct device *dev, struct sdhc_io *ios);
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