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Searched refs:instr (Results 1 – 23 of 23) sorted by relevance

/Zephyr-latest/arch/arm64/core/
Dsemihost.c10 long semihost_exec(enum semihost_instr instr, void *args) in semihost_exec() argument
12 register unsigned long w0 __asm__ ("w0") = instr; in semihost_exec()
Dsmccc-call.S19 .macro SMCCC instr
20 \instr #0
/Zephyr-latest/arch/arm/core/cortex_m/
Dsemihost.c10 long semihost_exec(enum semihost_instr instr, void *args) in semihost_exec() argument
12 register unsigned int r0 __asm__ ("r0") = instr; in semihost_exec()
/Zephyr-latest/arch/riscv/core/
Dsemihost.c21 long __aligned(16) semihost_exec(enum semihost_instr instr, void *args) in semihost_exec() argument
23 register unsigned long a0 __asm__ ("a0") = instr; in semihost_exec()
/Zephyr-latest/samples/drivers/jesd216/
DREADME.rst40 Support 1-1-2: instr 3Bh, 0 mode clocks, 8 waits
41 Support 1-1-4: instr 6Bh, 0 mode clocks, 8 waits
42 Support 1-2-2: instr BBh, 0 mode clocks, 4 waits
43 Support 1-4-4: instr EBh, 2 mode clocks, 4 waits
45 ET1: instr 20h for 4096 By; typ 48 ms, max 384 ms
46 ET2: instr 52h for 32768 By; typ 240 ms, max 1920 ms
47 ET3: instr D8h for 65536 By; typ 480 ms, max 3840 ms
/Zephyr-latest/arch/arm/core/cortex_a_r/
Dsemihost.c15 long semihost_exec(enum semihost_instr instr, void *args) in semihost_exec() argument
17 register unsigned long r0 __asm__ ("r0") = instr; in semihost_exec()
/Zephyr-latest/drivers/ethernet/
Deth_lan9250.c29 uint8_t instr[4]; in lan9250_write_sys_reg() local
34 sys_put_le32(data, instr); in lan9250_write_sys_reg()
40 tx_buf[2].buf = instr; in lan9250_write_sys_reg()
41 tx_buf[2].len = ARRAY_SIZE(instr); in lan9250_write_sys_reg()
410 uint8_t instr[2] = {(LAN9250_TX_DATA_FIFO >> 8) & 0xFF, (LAN9250_TX_DATA_FIFO & 0xFF)}; in lan9250_write_buf() local
416 tx_buf[1].buf = &instr; in lan9250_write_buf()
417 tx_buf[1].len = ARRAY_SIZE(instr); in lan9250_write_buf()
428 uint8_t instr[2] = {(LAN9250_RX_DATA_FIFO >> 8) & 0xFF, (LAN9250_RX_DATA_FIFO & 0xFF)}; in lan9250_read_buf() local
436 tx_buf[1].buf = &instr; in lan9250_read_buf()
437 tx_buf[1].len = ARRAY_SIZE(instr); in lan9250_read_buf()
/Zephyr-latest/arch/arm/core/
Dgdbstub.c28 unsigned int instr = sys_read32(ctx.registers[PC]); in is_bkpt() local
35 ret = ((instr & 0xFF00000) == 0x1200000) && ((instr & 0xF0) == 0x70); in is_bkpt()
38 ret = ((instr & 0xFF00) == 0xBE00); in is_bkpt()
/Zephyr-latest/drivers/flash/
Dflash_mcux_flexspi_nor.c750 struct jesd216_instr instr; in flash_flexspi_nor_config_flash() local
805 JESD216_MODE_144, &instr) > 0) { in flash_flexspi_nor_config_flash()
808 if (instr.mode_clocks == 2) { in flash_flexspi_nor_config_flash()
810 } else if (instr.mode_clocks == 1) { in flash_flexspi_nor_config_flash()
812 } else if (instr.mode_clocks == 0) { in flash_flexspi_nor_config_flash()
819 kFLEXSPI_Command_SDR, kFLEXSPI_1PAD, instr.instr, in flash_flexspi_nor_config_flash()
824 kFLEXSPI_Command_DUMMY_SDR, kFLEXSPI_4PAD, instr.wait_states); in flash_flexspi_nor_config_flash()
847 JESD216_MODE_122, &instr) > 0) { in flash_flexspi_nor_config_flash()
849 if (instr.mode_clocks == 4) { in flash_flexspi_nor_config_flash()
851 } else if (instr.mode_clocks == 2) { in flash_flexspi_nor_config_flash()
[all …]
Djesd216.h253 uint8_t instr; member
Djesd216.c19 res->instr = packed >> 8; in extract_instr()
Dflash_stm32_qspi.c1235 supported_modes[i], res.instr); in spi_nor_process_bfp()
1238 data->qspi_read_cmd = res.instr; in spi_nor_process_bfp()
1253 LOG_INF("Quad read mode %d instr [0x%x] will be used", data->mode, res.instr); in spi_nor_process_bfp()
Dflash_stm32_xspi.c1885 supported_read_modes[idx], read_instr.instr); in spi_nor_process_bfp()
1887 data->read_opcode = read_instr.instr; in spi_nor_process_bfp()
Dflash_stm32_ospi.c2048 supported_read_modes[idx], read_instr.instr); in spi_nor_process_bfp()
2050 data->read_opcode = read_instr.instr; in spi_nor_process_bfp()
/Zephyr-latest/include/zephyr/arch/nios2/
Dexception.h35 uint32_t instr; /* Instruction being executed when exc occurred */ member
/Zephyr-latest/include/zephyr/arch/common/
Dsemihost.h114 long semihost_exec(enum semihost_instr instr, void *args);
/Zephyr-latest/cmake/linker/ld/clang/
Dlinker_flags.cmake5 set_property(TARGET linker PROPERTY coverage -fprofile-instr-generate -fcoverage-mapping)
/Zephyr-latest/arch/nios2/core/offsets/
Doffsets.c64 GEN_OFFSET_STRUCT(arch_esf, instr);
/Zephyr-latest/arch/nios2/core/
Dfatal.c26 LOG_ERR("Faulting instruction: 0x%08x", esf->instr - 4); in z_nios2_fatal_error()
/Zephyr-latest/cmake/compiler/clang/
Dcompiler_flags.cmake19 set_compiler_property(PROPERTY coverage -fprofile-instr-generate -fcoverage-mapping)
/Zephyr-latest/samples/drivers/jesd216/src/
Dmain.c92 tag, cmd.instr, cmd.mode_clocks, cmd.wait_states); in summarize_dw1()
/Zephyr-latest/soc/espressif/esp32s2/
Ddefault.ld172 /* possibly align + add 16B for CPU dummy speculative instr. fetch */
469 /* align + add 16B for CPU dummy speculative instr. fetch */
/Zephyr-latest/doc/releases/
Drelease-notes-3.2.rst247 * Added data/instr. sync barriers after writing to ``SCTLR`` to disable MPU.