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Searched refs:clk_sys (Results 1 – 6 of 6) sorted by relevance

/Zephyr-latest/drivers/clock_control/
Dclock_stm32_ll_wb0.c275 uint32_t *rate, uint32_t slow_clock, uint32_t sysclk, uint32_t clk_sys) in get_apb0_periph_clkrate() argument
302 *rate = clk_sys; in get_apb0_periph_clkrate()
316 uint32_t *rate, uint32_t clk_sys) in get_apb1_periph_clkrate() argument
321 *rate = clk_sys; in get_apb1_periph_clkrate()
407 uint32_t sysclk, slow_clock, clk_sys; in stm32_clock_control_get_subsys_rate() local
442 clk_sys = CLOCK_FREQ_64MHZ >> LL_RCC_GetRC64MPLLPrescaler(); in stm32_clock_control_get_subsys_rate()
465 *rate = clk_sys; in stm32_clock_control_get_subsys_rate()
469 sysclk, clk_sys); in stm32_clock_control_get_subsys_rate()
471 return get_apb1_periph_clkrate(pclken, rate, clk_sys); in stm32_clock_control_get_subsys_rate()
Dclock_control_rpi_pico.c87 #define CLOCK_FREQ_clk_sys DT_PROP(DT_INST_CLOCKS_CTLR_BY_NAME(0, clk_sys), clock_frequency)
815 BUILD_ASSERT(SRC_CLOCK_FREQ(clk_sys) >= CLOCK_FREQ_clk_sys,
878 #if CLK_SRC_IS(clk_sys, clk_ref)
883 .aux_source = CLOCK_AUX_SOURCE(clk_sys),
885 .source_rate = SRC_CLOCK_FREQ(clk_sys),
886 .rate = CLOCK_FREQ(clk_sys),
/Zephyr-latest/dts/arm/raspberrypi/rpi_pico/
Drp2040.dtsi88 clk_sys: clk-sys { label
122 clocks = <&clk_sys>;
123 clock-names = "clk_sys";
230 <&clk_ref>, <&clk_sys>, <&clk_peri>,
235 "clk_ref", "clk_sys", "clk_peri",
Drp2350.dtsi92 clk_sys: clk-sys { label
118 clocks = <&clk_sys>;
119 clock-names = "clk_sys";
227 <&clk_hstx>, <&clk_ref>, <&clk_sys>, <&clk_peri>,
232 "clk_hstx", "clk_ref", "clk_sys", "clk_peri",
/Zephyr-latest/drivers/serial/
Duart_rpi_pico_pio.c154 sm_clock_div = (float)clock_get_hz(clk_sys) / (CYCLES_PER_BIT * config->baudrate); in pio_uart_init()
/Zephyr-latest/drivers/usb/udc/
Dudc_rpi_pico.c36 clock_control_subsys_t clk_sys; member
976 return clock_control_on(config->clk_dev, config->clk_sys); in udc_rpi_pico_init()
993 return clock_control_off(config->clk_dev, config->clk_sys); in udc_rpi_pico_shutdown()
1141 .clk_sys = (void *)DT_INST_PHA_BY_IDX(n, clocks, 0, clk_id), \