Searched refs:USART2_SEL (Results 1 – 12 of 12) sorted by relevance
| /Zephyr-latest/include/zephyr/dt-bindings/clock/ |
| D | stm32l0_clock.h | 71 #define USART2_SEL(val) STM32_DOMAIN_CLOCK(val, 3, 2, CCIPR_REG) macro
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| D | stm32f0_clock.h | 74 #define USART2_SEL(val) STM32_DOMAIN_CLOCK(val, 3, 16, CFGR3_REG) macro
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| D | stm32wl_clock.h | 78 #define USART2_SEL(val) STM32_DOMAIN_CLOCK(val, 3, 2, CCIPR_REG) macro
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| D | stm32u0_clock.h | 76 #define USART2_SEL(val) STM32_DOMAIN_CLOCK(val, 3, 2, CCIPR_REG) macro
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| D | stm32wba_clock.h | 87 #define USART2_SEL(val) STM32_DOMAIN_CLOCK(val, 3, 2, CCIPR1_REG) macro
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| D | stm32f3_clock.h | 85 #define USART2_SEL(val) STM32_DOMAIN_CLOCK(val, 3, 16, CFGR3_REG) macro
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| D | stm32g0_clock.h | 76 #define USART2_SEL(val) STM32_DOMAIN_CLOCK(val, 3, 2, CCIPR_REG) macro
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| D | stm32g4_clock.h | 80 #define USART2_SEL(val) STM32_DOMAIN_CLOCK(val, 3, 2, CCIPR_REG) macro
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| D | stm32f7_clock.h | 103 #define USART2_SEL(val) STM32_DOMAIN_CLOCK(val, 3, 2, DCKCFGR2_REG) macro
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| D | stm32l4_clock.h | 81 #define USART2_SEL(val) STM32_DOMAIN_CLOCK(val, 3, 2, CCIPR_REG) macro
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| D | stm32u5_clock.h | 97 #define USART2_SEL(val) STM32_DOMAIN_CLOCK(val, 3, 2, CCIPR1_REG) macro
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| D | stm32h5_clock.h | 98 #define USART2_SEL(val) STM32_DOMAIN_CLOCK(val, 7, 3, CCIPR1_REG) macro
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