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Searched refs:STM32_SRC_PLL_R (Results 1 – 10 of 10) sorted by relevance

/Zephyr-latest/include/zephyr/dt-bindings/clock/
Dstm32f4_clock.h36 #define STM32_SRC_PLL_R (STM32_SRC_PLL_Q + 1) macro
38 #define STM32_SRC_PLLI2S_Q (STM32_SRC_PLL_R + 1)
Dstm32f7_clock.h37 #define STM32_SRC_PLL_R (STM32_SRC_PLL_Q + 1) macro
39 #define STM32_SRC_PCLK (STM32_SRC_PLL_R + 1)
Dstm32wb_clock.h38 #define STM32_SRC_PLL_R (STM32_SRC_PLL_Q + 1) macro
Dstm32wl_clock.h39 #define STM32_SRC_PLL_R (STM32_SRC_PLL_Q + 1) macro
Dstm32u0_clock.h37 #define STM32_SRC_PLL_R (STM32_SRC_PLL_Q + 1) macro
Dstm32g0_clock.h36 #define STM32_SRC_PLL_R (STM32_SRC_PLL_Q + 1) macro
Dstm32g4_clock.h39 #define STM32_SRC_PLL_R (STM32_SRC_PLL_Q + 1) macro
Dstm32l4_clock.h37 #define STM32_SRC_PLL_R (STM32_SRC_PLL_Q + 1) macro
/Zephyr-latest/drivers/clock_control/
Dclock_stm32f2_f4_f7.c99 #if defined(STM32_SRC_PLL_R) && STM32_PLL_R_ENABLED && defined(RCC_PLLCFGR_PLLR) in config_pll_sysclock()
Dclock_stm32_ll_common.c210 #if defined(STM32_SRC_PLL_R) in enabled_clock()
211 case STM32_SRC_PLL_R: in enabled_clock()
427 #if defined(STM32_SRC_PLL_R) & STM32_PLL_R_ENABLED in stm32_clock_control_get_subsys_rate()
428 case STM32_SRC_PLL_R: in stm32_clock_control_get_subsys_rate()