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Searched refs:STM32_SRC_HSI16 (Results 1 – 9 of 9) sorted by relevance

/Zephyr-latest/include/zephyr/dt-bindings/clock/
Dstm32wba_clock.h20 #define STM32_SRC_HSI16 (STM32_SRC_HSE + 1) macro
22 #define STM32_SRC_HCLK1 (STM32_SRC_HSI16 + 1)
Dstm32u5_clock.h20 #define STM32_SRC_HSI16 (STM32_SRC_HSE + 1) macro
21 #define STM32_SRC_HSI48 (STM32_SRC_HSI16 + 1)
/Zephyr-latest/tests/drivers/clock_control/stm32_clock_configuration/stm32u5_devices/boards/
Dspi1_hsi_16.overlay19 <&rcc STM32_SRC_HSI16 SPI1_SEL(2)>;
/Zephyr-latest/samples/boards/st/power_mgmt/serial_wakeup/boards/
Db_u585i_iot02a.overlay18 <&rcc STM32_SRC_HSI16 USART1_SEL(2)>;
/Zephyr-latest/tests/drivers/clock_control/stm32_clock_configuration/stm32u5_devices/src/
Dtest_stm32_clock_configuration.c63 if (pclken[1].bus == STM32_SRC_HSI16) { in ZTEST()
/Zephyr-latest/drivers/clock_control/
Dclock_stm32_ll_wba.c53 ((src_clk == STM32_SRC_HSI16) && IS_ENABLED(STM32_HSI_ENABLED)) || in enabled_clock()
256 case STM32_SRC_HSI16: in stm32_clock_control_get_subsys_rate()
Dclock_stm32_ll_u5.c132 ((src_clk == STM32_SRC_HSI16) && IS_ENABLED(STM32_HSI_ENABLED)) || in enabled_clock()
261 case STM32_SRC_HSI16: in stm32_clock_control_get_subsys_rate()
/Zephyr-latest/boards/st/nucleo_wba55cg/
Dnucleo_wba55cg.dts118 <&rcc STM32_SRC_HSI16 USART1_SEL(2)>;
/Zephyr-latest/dts/arm/st/wba/
Dstm32wba.dtsi459 <&rcc STM32_SRC_HSI16 RNG_SEL(2)>;