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Searched refs:STM32_SRC_HCLK (Results 1 – 9 of 9) sorted by relevance

/Zephyr-latest/include/zephyr/dt-bindings/clock/
Dstm32u5_clock.h25 #define STM32_SRC_HCLK (STM32_SRC_MSIK + 1) macro
26 #define STM32_SRC_PCLK1 (STM32_SRC_HCLK + 1)
Dstm32h5_clock.h24 #define STM32_SRC_HCLK (STM32_SRC_HSI48 + 1) macro
25 #define STM32_SRC_PCLK1 (STM32_SRC_HCLK + 1)
/Zephyr-latest/boards/st/nucleo_h533re/
Dnucleo_h533re.dts132 <&rcc STM32_SRC_HCLK ADCDAC_SEL(0)>;
/Zephyr-latest/dts/arm/st/u5/
Dstm32u595.dtsi68 <&rcc STM32_SRC_HCLK ADCDAC_SEL(0)>;
Dstm32u5.dtsi785 <&rcc STM32_SRC_HCLK ADCDAC_SEL(0)>;
803 <&rcc STM32_SRC_HCLK ADCDAC_SEL(0)>;
/Zephyr-latest/boards/st/nucleo_h563zi/
Dnucleo_h563zi-common.dtsi156 <&rcc STM32_SRC_HCLK ADCDAC_SEL(0)>;
/Zephyr-latest/drivers/clock_control/
Dclock_stm32_ll_h5.c122 (src_clk == STM32_SRC_HCLK) || in enabled_clock()
232 case STM32_SRC_HCLK: in stm32_clock_control_get_subsys_rate()
Dclock_stm32_ll_u5.c127 (src_clk == STM32_SRC_HCLK) || in enabled_clock()
241 case STM32_SRC_HCLK: in stm32_clock_control_get_subsys_rate()
/Zephyr-latest/boards/st/stm32h573i_dk/
Dstm32h573i_dk.dts241 <&rcc STM32_SRC_HCLK ADCDAC_SEL(0)>;