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Searched refs:STM32_CLOCK_CONTROL_NODE (Results 1 – 25 of 61) sorted by relevance

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/Zephyr-latest/tests/drivers/clock_control/stm32_clock_configuration/stm32_common_devices/src/
Dtest_stm32_clock_configuration_i2c.c34 int r = clock_control_configure(DEVICE_DT_GET(STM32_CLOCK_CONTROL_NODE), in i2c_set_clock()
56 status = clock_control_get_status(DEVICE_DT_GET(STM32_CLOCK_CONTROL_NODE), in i2c_set_clock()
61 r = clock_control_get_rate(DEVICE_DT_GET(STM32_CLOCK_CONTROL_NODE), in i2c_set_clock()
82 status = clock_control_get_status(DEVICE_DT_GET(STM32_CLOCK_CONTROL_NODE), in ZTEST()
88 r = clock_control_on(DEVICE_DT_GET(STM32_CLOCK_CONTROL_NODE), in ZTEST()
94 status = clock_control_get_status(DEVICE_DT_GET(STM32_CLOCK_CONTROL_NODE), in ZTEST()
113 r = clock_control_get_rate(DEVICE_DT_GET(STM32_CLOCK_CONTROL_NODE), in ZTEST()
127 r = clock_control_off(DEVICE_DT_GET(STM32_CLOCK_CONTROL_NODE), in ZTEST()
Dtest_stm32_clock_configuration_adc.c66 status = clock_control_get_status(DEVICE_DT_GET(STM32_CLOCK_CONTROL_NODE), in ZTEST()
72 r = clock_control_on(DEVICE_DT_GET(STM32_CLOCK_CONTROL_NODE), in ZTEST()
78 status = clock_control_get_status(DEVICE_DT_GET(STM32_CLOCK_CONTROL_NODE), in ZTEST()
86 r = clock_control_configure(DEVICE_DT_GET(STM32_CLOCK_CONTROL_NODE), in ZTEST()
116 status = clock_control_get_status(DEVICE_DT_GET(STM32_CLOCK_CONTROL_NODE), in ZTEST()
121 r = clock_control_get_rate(DEVICE_DT_GET(STM32_CLOCK_CONTROL_NODE), in ZTEST()
141 r = clock_control_off(DEVICE_DT_GET(STM32_CLOCK_CONTROL_NODE), in ZTEST()
Dtest_stm32_clock_configuration_lptim.c33 r = clock_control_on(DEVICE_DT_GET(STM32_CLOCK_CONTROL_NODE), in ZTEST()
42 r = clock_control_configure(DEVICE_DT_GET(STM32_CLOCK_CONTROL_NODE), in ZTEST()
64 r = clock_control_get_rate(DEVICE_DT_GET(STM32_CLOCK_CONTROL_NODE), in ZTEST()
80 r = clock_control_get_rate(DEVICE_DT_GET(STM32_CLOCK_CONTROL_NODE), in ZTEST()
94 r = clock_control_off(DEVICE_DT_GET(STM32_CLOCK_CONTROL_NODE), in ZTEST()
Dtest_stm32_clock_configuration_i2s.c28 r = clock_control_on(DEVICE_DT_GET(STM32_CLOCK_CONTROL_NODE), in ZTEST()
38 r = clock_control_configure(DEVICE_DT_GET(STM32_CLOCK_CONTROL_NODE), in ZTEST()
56 r = clock_control_get_rate(DEVICE_DT_GET(STM32_CLOCK_CONTROL_NODE), in ZTEST()
69 r = clock_control_off(DEVICE_DT_GET(STM32_CLOCK_CONTROL_NODE), in ZTEST()
Dtest_stm32_clock_configuration_sdmmc.c38 r = clock_control_on(DEVICE_DT_GET(STM32_CLOCK_CONTROL_NODE), in ZTEST()
53 r = clock_control_configure(DEVICE_DT_GET(STM32_CLOCK_CONTROL_NODE), in ZTEST()
112 r = clock_control_get_rate(DEVICE_DT_GET(STM32_CLOCK_CONTROL_NODE), in ZTEST()
123 r = clock_control_off(DEVICE_DT_GET(STM32_CLOCK_CONTROL_NODE), in ZTEST()
/Zephyr-latest/tests/drivers/clock_control/stm32_clock_configuration/stm32u5_devices/src/
Dtest_stm32_clock_configuration.c45 r = clock_control_on(DEVICE_DT_GET(STM32_CLOCK_CONTROL_NODE), in ZTEST()
54 r = clock_control_configure(DEVICE_DT_GET(STM32_CLOCK_CONTROL_NODE), in ZTEST()
76 r = clock_control_get_rate(DEVICE_DT_GET(STM32_CLOCK_CONTROL_NODE), in ZTEST()
89 r = clock_control_get_rate(DEVICE_DT_GET(STM32_CLOCK_CONTROL_NODE), in ZTEST()
101 r = clock_control_off(DEVICE_DT_GET(STM32_CLOCK_CONTROL_NODE), in ZTEST()
/Zephyr-latest/tests/drivers/clock_control/stm32_clock_configuration/stm32h7_devices/src/
Dtest_stm32_clock_configuration.c46 r = clock_control_on(DEVICE_DT_GET(STM32_CLOCK_CONTROL_NODE), in ZTEST()
57 r = clock_control_configure(DEVICE_DT_GET(STM32_CLOCK_CONTROL_NODE), in ZTEST()
112 r = clock_control_get_rate(DEVICE_DT_GET(STM32_CLOCK_CONTROL_NODE), in ZTEST()
125 r = clock_control_get_rate(DEVICE_DT_GET(STM32_CLOCK_CONTROL_NODE), in ZTEST()
139 r = clock_control_off(DEVICE_DT_GET(STM32_CLOCK_CONTROL_NODE), in ZTEST()
/Zephyr-latest/drivers/clock_control/
Dclock_stm32_mux.c28 if (clock_control_configure(DEVICE_DT_GET(STM32_CLOCK_CONTROL_NODE), in stm32_clk_mux_init()
Dclock_stm32_ll_wb0.c25 #define RCC_REG(_reg_offset) (DT_REG_ADDR(STM32_CLOCK_CONTROL_NODE) + (_reg_offset))
33 #define DT_RCC_SLOWCLK_NODE DT_PHANDLE(STM32_CLOCK_CONTROL_NODE, slow_clock)
38 DT_PROP(STM32_CLOCK_CONTROL_NODE, clksys_prescaler)
40 #if DT_NODE_HAS_PROP(STM32_CLOCK_CONTROL_NODE, slow_clock)
798 DEVICE_DT_DEFINE(STM32_CLOCK_CONTROL_NODE,
/Zephyr-latest/soc/st/stm32/common/
Dstm32_backup_sram.c28 const struct device *const clk = DEVICE_DT_GET(STM32_CLOCK_CONTROL_NODE); in stm32_backup_sram_init()
/Zephyr-latest/drivers/sensor/st/qdec_stm32/
Dqdec_stm32.c91 if (!device_is_ready(DEVICE_DT_GET(STM32_CLOCK_CONTROL_NODE))) { in qdec_stm32_initialize()
96 retval = clock_control_on(DEVICE_DT_GET(STM32_CLOCK_CONTROL_NODE), in qdec_stm32_initialize()
/Zephyr-latest/drivers/usb/device/
Dusb_dc_dw_stm32.h66 .dev = DEVICE_DT_GET(STM32_CLOCK_CONTROL_NODE), \
/Zephyr-latest/drivers/memc/
Dmemc_stm32.c54 clk = DEVICE_DT_GET(STM32_CLOCK_CONTROL_NODE); in memc_stm32_init()
/Zephyr-latest/soc/st/stm32/stm32wbax/hci_if/
Dbleplat.c96 rcc = DEVICE_DT_GET(STM32_CLOCK_CONTROL_NODE); in enable_rng_clock()
/Zephyr-latest/drivers/watchdog/
Dwdt_wwdg_stm32.c92 const struct device *const clk = DEVICE_DT_GET(STM32_CLOCK_CONTROL_NODE); in wwdg_stm32_get_pclk()
282 const struct device *const clk = DEVICE_DT_GET(STM32_CLOCK_CONTROL_NODE); in wwdg_stm32_init()
/Zephyr-latest/drivers/i2c/
Di2c_ll_stm32.c86 const struct device *clk = DEVICE_DT_GET(STM32_CLOCK_CONTROL_NODE); in i2c_stm32_runtime_configure()
335 const struct device *const clk = DEVICE_DT_GET(STM32_CLOCK_CONTROL_NODE); in i2c_stm32_suspend()
362 const struct device *const clk = DEVICE_DT_GET(STM32_CLOCK_CONTROL_NODE); in i2c_stm32_activate()
384 const struct device *const clk = DEVICE_DT_GET(STM32_CLOCK_CONTROL_NODE); in i2c_stm32_init()
/Zephyr-latest/drivers/counter/
Dcounter_ll_stm32_rtc.c189 const struct device *const clk = DEVICE_DT_GET(STM32_CLOCK_CONTROL_NODE); in rtc_stm32_start()
212 const struct device *const clk = DEVICE_DT_GET(STM32_CLOCK_CONTROL_NODE); in rtc_stm32_stop()
552 const struct device *const clk = DEVICE_DT_GET(STM32_CLOCK_CONTROL_NODE); in rtc_stm32_init()
654 const struct device *const clk = DEVICE_DT_GET(STM32_CLOCK_CONTROL_NODE); in rtc_stm32_pm_action()
/Zephyr-latest/drivers/sensor/st/stm32_digi_temp/
Dstm32_digi_temp.c171 const struct device *const clk = DEVICE_DT_GET(STM32_CLOCK_CONTROL_NODE); in stm32_digi_temp_init()
228 const struct device *const clk = DEVICE_DT_GET(STM32_CLOCK_CONTROL_NODE); in stm32_digi_temp_pm_action()
/Zephyr-latest/drivers/ethernet/
Deth_dwmac_stm32h7x.c53 p->clock = DEVICE_DT_GET(STM32_CLOCK_CONTROL_NODE); in dwmac_bus_init()
/Zephyr-latest/subsys/mgmt/ec_host_cmd/backends/
Dec_host_cmd_backend_spi_stm32.c335 if (!device_is_ready(DEVICE_DT_GET(STM32_CLOCK_CONTROL_NODE))) { in spi_init()
340 err = clock_control_on(DEVICE_DT_GET(STM32_CLOCK_CONTROL_NODE), in spi_init()
350 DEVICE_DT_GET(STM32_CLOCK_CONTROL_NODE), in spi_init()
837 err = clock_control_on(DEVICE_DT_GET(STM32_CLOCK_CONTROL_NODE), in ec_host_cmd_spi_stm32_pm_action()
861 err = clock_control_off(DEVICE_DT_GET(STM32_CLOCK_CONTROL_NODE), in ec_host_cmd_spi_stm32_pm_action()
/Zephyr-latest/drivers/ipm/
Dipm_stm32_hsem.c157 const struct device *const clk = DEVICE_DT_GET(STM32_CLOCK_CONTROL_NODE); in stm32_hsem_mailbox_init()
/Zephyr-latest/drivers/dac/
Ddac_stm32.c148 const struct device *const clk = DEVICE_DT_GET(STM32_CLOCK_CONTROL_NODE); in dac_stm32_init()
/Zephyr-latest/drivers/spi/
Dspi_ll_stm32.c611 if (clock_control_get_rate(DEVICE_DT_GET(STM32_CLOCK_CONTROL_NODE), in spi_stm32_configure()
617 if (clock_control_get_rate(DEVICE_DT_GET(STM32_CLOCK_CONTROL_NODE), in spi_stm32_configure()
1178 if (!device_is_ready(DEVICE_DT_GET(STM32_CLOCK_CONTROL_NODE))) { in spi_stm32_init()
1183 err = clock_control_on(DEVICE_DT_GET(STM32_CLOCK_CONTROL_NODE), in spi_stm32_init()
1191 err = clock_control_configure(DEVICE_DT_GET(STM32_CLOCK_CONTROL_NODE), in spi_stm32_init()
1245 const struct device *const clk = DEVICE_DT_GET(STM32_CLOCK_CONTROL_NODE); in spi_stm32_pm_action()
/Zephyr-latest/drivers/mbox/
Dmbox_stm32_hsem.c203 const struct device *const clk = DEVICE_DT_GET(STM32_CLOCK_CONTROL_NODE); in mbox_stm32_clock_init()
/Zephyr-latest/drivers/display/
Ddisplay_stm32_ltdc.c330 if (!device_is_ready(DEVICE_DT_GET(STM32_CLOCK_CONTROL_NODE))) { in stm32_ltdc_init()
336 err = clock_control_on(DEVICE_DT_GET(STM32_CLOCK_CONTROL_NODE), in stm32_ltdc_init()
439 err = clock_control_off(DEVICE_DT_GET(STM32_CLOCK_CONTROL_NODE), in stm32_ltdc_suspend()

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