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Searched refs:SRAM_BANK_SIZE (Results 1 – 4 of 4) sorted by relevance

/Zephyr-latest/drivers/mm/
Dmm_drv_intel_adsp.h56 #define SRAM_BANK_SIZE (128 * 1024) macro
57 #define L2_SRAM_BANK_NUM (L2_SRAM_SIZE / SRAM_BANK_SIZE)
Dmm_drv_intel_adsp_mtl_tlb.c31 #define SRAM_BANK_PAGE_NUM (SRAM_BANK_SIZE / CONFIG_MM_DRV_PAGE_SIZE)
87 return (phys_offset / SRAM_BANK_SIZE); in get_hpsram_bank_idx()
737 uint32_t avalible_memory_size = ace_hpsram_get_bank_count() * SRAM_BANK_SIZE; in sys_mm_drv_mm_init()
769 used_pages = L2_SRAM_BANK_NUM * SRAM_BANK_SIZE / CONFIG_MM_DRV_PAGE_SIZE; in sys_mm_drv_mm_init()
906 uint32_t bank_idx = (phys_offset / SRAM_BANK_SIZE); in adsp_mm_restore_context()
/Zephyr-latest/soc/intel/intel_adsp/cavs/include/cavs25/
Dadsp_memory.h24 #define SRAM_BANK_SIZE (64 * 1024) macro
26 #define HPSRAM_EBB_COUNT (DT_REG_SIZE(DT_NODELABEL(sram0)) / SRAM_BANK_SIZE)
/Zephyr-latest/soc/intel/intel_adsp/cavs/
Dsram.c21 BUILD_ASSERT((DT_REG_SIZE(DT_NODELABEL(sram0)) % SRAM_BANK_SIZE) == 0,
106 ebb_in_use = DIV_ROUND_UP(memory_size, SRAM_BANK_SIZE); in hp_sram_init()