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Searched refs:SPI_MEM_REJECT_CACHE_INTR_SOURCE (Results 1 – 4 of 4) sorted by relevance

/Zephyr-latest/include/zephyr/dt-bindings/interrupt-controller/
Desp-esp32c2-intmux.h39 #define SPI_MEM_REJECT_CACHE_INTR_SOURCE 29 macro
Desp-esp32c3-intmux.h50 #define SPI_MEM_REJECT_CACHE_INTR_SOURCE 40 macro
Desp32s3-xtensa-intmux.h66 #define SPI_MEM_REJECT_CACHE_INTR_SOURCE 60 /* interrupt of SPI0/SPI1 Cache/Rejected, LEVEL*/ macro
Desp32s2-xtensa-intmux.h93 #define SPI_MEM_REJECT_CACHE_INTR_SOURCE 83 /* SPI0 Cache access and macro