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Searched refs:IS_BIT_SET (Results 1 – 22 of 22) sorted by relevance

/Zephyr-latest/drivers/espi/
Dhost_subs_npcx.c274 kbc_evt->type = IS_BIT_SET(inst_kbc->HIKMST, NPCX_HIKMST_A2); in host_kbc_ibf_isr()
354 acpi_evt->type = IS_BIT_SET(inst_acpi->HIPMST, NPCX_HIPMST_CMD); in host_acpi_process_input_data()
478 if (IS_BIT_SET(inst_acpi->HIPMST, NPCX_HIPMST_IBF)) { in host_pmch_ibf_isr()
489 if (IS_BIT_SET(inst_hcmd->HIPMST, NPCX_HIPMST_IBF)) { in host_pmch_ibf_isr()
552 while (IS_BIT_SET(inst_shm->DP80STS, NPCX_DP80STS_FNE)) { in host_port80_isr()
565 while (IS_BIT_SET(inst_shm->DP80STS, NPCX_DP80STS_FNE)) { in host_port80_isr()
574 if (IS_BIT_SET(status, NPCX_DP80STS_FOR)) { in host_port80_isr()
583 if (!IS_BIT_SET(inst_shm->DP80STS, NPCX_DP80STS_FNE)) { in host_port80_isr()
687 while (IS_BIT_SET(inst_c2h->SIBCTRL, NPCX_SIBCTRL_CSWR)) { in host_c2h_wait_write_done()
704 while (IS_BIT_SET(inst_c2h->SIBCTRL, NPCX_SIBCTRL_CSRD)) { in host_c2h_wait_read_done()
[all …]
Despi_npcx.c315 evt.evt_data = IS_BIT_SET(inst->ESPICFG, in espi_bus_cfg_update_isr()
321 IS_BIT_SET(inst->FLASHCTL, NPCX_FLASHCTL_FLASH_TX_AVAIL)) { in espi_bus_cfg_update_isr()
339 if ((chg_mask & BIT(NPCX_ESPI_CH_VW)) && IS_BIT_SET(inst->ESPICFG, in espi_bus_cfg_update_isr()
348 if (IS_BIT_SET(inst->ESPICFG, NPCX_ESPICFG_FLCHANMODE)) { in espi_bus_cfg_update_isr()
513 if (IS_BIT_SET(inst->VWEVMS[idx], NPCX_VWEVMS_IE) && in espi_vw_config_input()
514 IS_BIT_SET(inst->VWEVMS[idx], NPCX_VWEVMS_WE)) { in espi_vw_config_input()
706 data->espi_rst_level = IS_BIT_SET(inst->ESPISTS, in espi_vw_espi_rst_isr()
788 sts = IS_BIT_SET(inst->ESPICFG, NPCX_ESPICFG_PCHANEN); in espi_npcx_channel_ready()
791 sts = IS_BIT_SET(inst->ESPICFG, NPCX_ESPICFG_VWCHANEN); in espi_npcx_channel_ready()
794 sts = IS_BIT_SET(inst->ESPICFG, NPCX_ESPICFG_OOBCHANEN); in espi_npcx_channel_ready()
[all …]
Despi_taf_npcx.c125 rdpr = IS_BIT_SET(inst->FLASH_PRTR_BADDR[i], NPCX_FRGN_RPR); in espi_taf_check_read_protect()
128 if (rdpr && !IS_BIT_SET(override_rd, tag) && in espi_taf_check_read_protect()
155 wrpr = IS_BIT_SET(inst->FLASH_PRTR_BADDR[i], NPCX_FRGN_WPR); in espi_taf_check_write_protect()
158 if (wrpr && !IS_BIT_SET(override_wr, tag) && in espi_taf_check_write_protect()
318 if (WAIT_FOR(!IS_BIT_SET(inst->FLASHCTL, NPCX_FLASHCTL_FLASH_TX_AVAIL), in taf_npcx_completion_handler()
673 if (!IS_BIT_SET(inst->FLASHCTL, NPCX_FLASHCTL_SAF_AUTO_READ)) { in espi_taf_npcx_block()
678 if (WAIT_FOR(!IS_BIT_SET(inst->ESPISTS, NPCX_ESPISTS_FLAUTORDREQ), in espi_taf_npcx_block()
686 if (WAIT_FOR(IS_BIT_SET(inst->ESPISTS, NPCX_ESPISTS_AUTO_RD_DIS_STS), in espi_taf_npcx_block()
/Zephyr-latest/drivers/sensor/nuvoton/nuvoton_tach_npcx/
Dtach_nuvoton_npcx.c146 IS_BIT_SET(inst->TECTRL, NPCX_TECTRL_TCPND), in tach_npcx_is_underflow()
147 IS_BIT_SET(inst->TECTRL, NPCX_TECTRL_TDPND)); in tach_npcx_is_underflow()
154 return IS_BIT_SET(inst->TECTRL, NPCX_TECTRL_TCPND); in tach_npcx_is_underflow()
156 return IS_BIT_SET(inst->TECTRL, NPCX_TECTRL_TDPND); in tach_npcx_is_underflow()
178 IS_BIT_SET(inst->TECTRL, NPCX_TECTRL_TAPND), in tach_npcx_is_captured()
179 IS_BIT_SET(inst->TECTRL, NPCX_TECTRL_TBPND)); in tach_npcx_is_captured()
186 return IS_BIT_SET(inst->TECTRL, NPCX_TECTRL_TAPND); in tach_npcx_is_captured()
188 return IS_BIT_SET(inst->TECTRL, NPCX_TECTRL_TBPND); in tach_npcx_is_captured()
/Zephyr-latest/drivers/watchdog/
Dwdt_npcx.c111 while (!IS_BIT_SET(inst->T0CSR, NPCX_T0CSR_RST)) { in wdt_t0out_reload()
118 while (IS_BIT_SET(inst->T0CSR, NPCX_T0CSR_RST)) { in wdt_t0out_reload()
121 if (IS_BIT_SET(inst->T0CSR, NPCX_T0CSR_RST)) { in wdt_t0out_reload()
138 while (IS_BIT_SET(inst->T0CSR, NPCX_T0CSR_WD_RUN)) { in wdt_wait_stopped()
141 if (IS_BIT_SET(inst->T0CSR, NPCX_T0CSR_WD_RUN)) { in wdt_wait_stopped()
191 if (IS_BIT_SET(inst->T0CSR, NPCX_T0CSR_WD_RUN)) { in wdt_npcx_install_timeout()
240 if (IS_BIT_SET(inst->T0CSR, NPCX_T0CSR_WD_RUN)) { in wdt_npcx_setup()
/Zephyr-latest/drivers/i3c/
Di3c_npcx.c322 if (WAIT_FOR(IS_BIT_SET(inst->MSTATUS, bit_offset), NPCX_I3C_CHK_TIMEOUT_US, NULL) == in npcx_i3c_status_wait_clear()
374 if (IS_BIT_SET(inst->MSTATUS, NPCX_I3C_MSTATUS_ERRWARN)) { in npcx_i3c_has_error()
418 if (IS_BIT_SET(inst->MERRWARN, NPCX_I3C_MERRWARN_INVERQ)) { in npcx_i3c_send_request()
512 if (IS_BIT_SET(inst->MERRWARN, NPCX_I3C_MERRWARN_NACK)) { in npcx_i3c_request_emit_start()
680 while (IS_BIT_SET(inst->MSTATUS, NPCX_I3C_MSTATUS_TGTSTART)) { in npcx_i3c_recover_bus()
686 if (WAIT_FOR(IS_BIT_SET(inst->MSTATUS, NPCX_I3C_MSTATUS_COMPLETE), in npcx_i3c_recover_bus()
692 while (IS_BIT_SET(inst->MSTATUS, NPCX_I3C_MSTATUS_RXPEND)) { in npcx_i3c_recover_bus()
744 if (WAIT_FOR(!IS_BIT_SET(inst->MDATACTRL, NPCX_I3C_MDATACTRL_TXFULL), in npcx_i3c_xfer_write_fifo()
783 if (IS_BIT_SET(inst->MSTATUS, NPCX_I3C_MSTATUS_COMPLETE)) { in npcx_i3c_xfer_read_fifo()
790 if (IS_BIT_SET(inst->MERRWARN, NPCX_I3C_MERRWARN_TIMEOUT)) { in npcx_i3c_xfer_read_fifo()
[all …]
/Zephyr-latest/drivers/ps2/
Dps2_npcx_controller.c148 return (IS_BIT_SET(inst->PSTAT, NPCX_PSTAT_SOT) || in ps2_npcx_ctrl_bus_busy()
149 IS_BIT_SET(inst->PSTAT, NPCX_PSTAT_EOT)) ? in ps2_npcx_ctrl_bus_busy()
266 if (IS_BIT_SET(inst->PSTAT, NPCX_PSTAT_SOT) && in ps2_npcx_ctrl_isr()
267 IS_BIT_SET(inst->PSIEN, NPCX_PSIEN_SOTIE)) { in ps2_npcx_ctrl_isr()
276 } else if (IS_BIT_SET(inst->PSTAT, NPCX_PSTAT_EOT)) { in ps2_npcx_ctrl_isr()
286 if (IS_BIT_SET(inst->PSCON, NPCX_PSCON_XMT)) { in ps2_npcx_ctrl_isr()
/Zephyr-latest/drivers/serial/
Duart_npcx.c170 return IS_BIT_SET(inst->UFRSTS, NPCX_UFRSTS_RFIFO_NEMPTY_STS); in uart_npcx_rx_fifo_available()
272 return IS_BIT_SET(inst->UFTCTL, NPCX_UFTCTL_TEMPTY_EN); in uart_npcx_irq_tx_is_enabled()
286 return IS_BIT_SET(inst->UFTSTS, NPCX_UFTSTS_NXMIP); in uart_npcx_irq_tx_complete()
310 return IS_BIT_SET(inst->UFRCTL, NPCX_UFRCTL_RNEMPTY_EN); in uart_npcx_irq_rx_is_enabled()
393 if (!IS_BIT_SET(inst->UICTRL, NPCX_UICTRL_RBF)) { in uart_npcx_poll_in()
410 while (!IS_BIT_SET(inst->UICTRL, NPCX_UICTRL_TBE)) { in uart_npcx_poll_out()
473 if (IS_BIT_SET(mdma_reg_base->MDMA_CTL0, NPCX_MDMA_CTL_MDMAEN)) { in uart_npcx_async_rx_dma_get_status()
539 if (IS_BIT_SET(mdma_reg_base->MDMA_CTL1, NPCX_MDMA_CTL_MDMAEN)) { in uart_npcx_async_tx_dma_get_status()
854 } else if (IS_BIT_SET(inst->UFRCTL, NPCX_UFRCTL_RNEMPTY_EN)) { in uart_npcx_isr()
860 if (IS_BIT_SET(mdma_reg_base->MDMA_CTL0, NPCX_MDMA_CTL_TC) && in uart_npcx_isr()
[all …]
/Zephyr-latest/drivers/i2c/
Di2c_npcx_controller.c260 return IS_BIT_SET(inst->SMBCST, NPCX_SMBCST_BB); in i2c_ctrl_bus_busy()
482 if (!IS_BIT_SET(inst->SMBCTL1, NPCX_SMBCTL1_STOP)) { in i2c_ctrl_wait_stop_completed()
499 if (IS_BIT_SET(inst->SMBCTL3, NPCX_SMBCTL3_SCL_LVL) && in i2c_ctrl_is_scl_sda_both_high()
500 IS_BIT_SET(inst->SMBCTL3, NPCX_SMBCTL3_SDA_LVL)) { in i2c_ctrl_is_scl_sda_both_high()
854 if (IS_BIT_SET(status, NPCX_SMBST_BER)) { in i2c_ctrl_target_isr()
884 if (IS_BIT_SET(status, NPCX_SMBST_SLVSTP)) { in i2c_ctrl_target_isr()
901 if (IS_BIT_SET(status, NPCX_SMBST_NEGACK)) { in i2c_ctrl_target_isr()
909 if (IS_BIT_SET(status, NPCX_SMBST_NMATCH)) { in i2c_ctrl_target_isr()
914 if (IS_BIT_SET(inst->SMBST, NPCX_SMBST_XMIT)) { in i2c_ctrl_target_isr()
934 if (IS_BIT_SET(status, NPCX_SMBST_SDAST)) { in i2c_ctrl_target_isr()
[all …]
/Zephyr-latest/drivers/spi/
Dspi_npcx_spip.c185 if (WAIT_FOR(!IS_BIT_SET(reg_base->SPIP_STAT, NPCX_SPIP_STAT_BSY), in spi_npcx_spip_xfer_frame()
193 if (WAIT_FOR(IS_BIT_SET(reg_base->SPIP_STAT, NPCX_SPIP_STAT_RBF), in spi_npcx_spip_xfer_frame()
224 if (!IS_BIT_SET(status, NPCX_SPIP_STAT_BSY) && !IS_BIT_SET(status, NPCX_SPIP_STAT_RBF)) { in spi_npcx_spip_isr()
229 } else if (IS_BIT_SET(status, NPCX_SPIP_STAT_RBF)) { in spi_npcx_spip_isr()
292 while (IS_BIT_SET(reg_base->SPIP_STAT, NPCX_SPIP_STAT_RBF)) { in transceive()
/Zephyr-latest/drivers/timer/
Dnpcx_itim_timer.c120 while (!IS_BIT_SET(evt_tmr->ITCTS32, NPCX_ITCTSXX_ITEN)) { in npcx_itim_evt_enable()
124 if (!IS_BIT_SET(evt_tmr->ITCTS32, NPCX_ITCTSXX_ITEN)) { in npcx_itim_evt_enable()
174 if (IS_BIT_SET(evt_tmr->ITCTS32, NPCX_ITCTSXX_ITEN)) { in npcx_itim_start_evt_tmr_by_tick()
243 if (IS_BIT_SET(sys_cts, NPCX_ITCTSXX_TO_STS) || (cnt2 > cnt1)) { in npcx_itim_evt_elapsed_cyc32()
/Zephyr-latest/drivers/peci/
Dpeci_npcx.c47 if (IS_BIT_SET(reg->PECI_CTL_STS, NPCX_PECI_CTL_STS_START_BUSY)) { in peci_npcx_check_bus_idle()
215 if (IS_BIT_SET(status, NPCX_PECI_CTL_STS_ABRT_ERR)) { in peci_npcx_isr()
218 } else if (IS_BIT_SET(status, NPCX_PECI_CTL_STS_CRC_ERR)) { in peci_npcx_isr()
/Zephyr-latest/subsys/net/lib/shell/
Dhttp.c59 if (IS_BIT_SET(detail->bitmask_of_supported_http_methods, i)) { in cmd_net_http()
/Zephyr-latest/soc/nuvoton/npcx/common/
Dscfg.c142 if (!IS_BIT_SET(inst_scfg->DEV_CTL4, NPCX_DEV_CTL4_WP_IF)) { in npcx_pinctrl_flash_write_protect_set()
153 return IS_BIT_SET(inst_scfg->DEV_CTL4, NPCX_DEV_CTL4_WP_IF); in npcx_pinctrl_flash_write_protect_is_set()
/Zephyr-latest/subsys/mgmt/ec_host_cmd/backends/
Dec_host_cmd_backend_shi_npcx.c706 if (IS_BIT_SET(stat2, NPCX_EVSTAT2_CSNFE)) { in shi_npcx_isr()
715 if (!IS_BIT_SET(inst->SHICFG2, NPCX_SHICFG2_BUSY)) { in shi_npcx_isr()
730 if (IS_BIT_SET(stat2, NPCX_EVSTAT2_CSNRE)) { in shi_npcx_isr()
748 if (IS_BIT_SET(stat2, NPCX_EVSTAT2_IBHF2)) { in shi_npcx_isr()
762 if (IS_BIT_SET(stat, NPCX_EVSTAT_IBHF)) { in shi_npcx_isr()
771 if (IS_BIT_SET(stat, NPCX_EVSTAT_IBF)) { in shi_npcx_isr()
906 if (IS_BIT_SET(inst->SHICFG2, NPCX_SHICFG2_BUSY)) { in shi_npcx_cs_wui_isr()
/Zephyr-latest/drivers/flash/
Dflash_npcx_fiu_qspi.c69 while (IS_BIT_SET(inst->UMA_CTS, NPCX_UMA_CTS_EXEC_DONE)) { in qspi_npcx_uma_write_byte()
80 while (IS_BIT_SET(inst->UMA_CTS, NPCX_UMA_CTS_EXEC_DONE)) { in qspi_npcx_uma_read_byte()
/Zephyr-latest/subsys/net/lib/http/
Dhttp_server_core.c799 if (IS_BIT_SET(supported_compression, HTTP_BR)) { in http_server_find_file()
807 if (IS_BIT_SET(supported_compression, HTTP_GZIP)) { in http_server_find_file()
815 if (IS_BIT_SET(supported_compression, HTTP_ZSTD)) { in http_server_find_file()
823 if (IS_BIT_SET(supported_compression, HTTP_COMPRESS)) { in http_server_find_file()
831 if (IS_BIT_SET(supported_compression, HTTP_DEFLATE)) { in http_server_find_file()
/Zephyr-latest/drivers/interrupt_controller/
Dintc_miwu.c135 if (IS_BIT_SET(NPCX_WKST(base, group), bit)) { in npcx_miwu_set_pseudo_both_edge()
229 return IS_BIT_SET(NPCX_WKEN(base, wui->group), wui->bit); in npcx_miwu_irq_get_state()
241 bool pending = IS_BIT_SET(NPCX_WKPND(base, wui->group), wui->bit); in npcx_miwu_irq_get_and_clear_pending()
/Zephyr-latest/drivers/adc/
Dadc_npcx.c200 if (IS_BIT_SET(status, NPCX_ADCSTS_EOCCEV) && in adc_npcx_isr()
201 IS_BIT_SET(inst->ADCCNF, NPCX_ADCCNF_INTECCEN)) { in adc_npcx_isr()
249 if (IS_BIT_SET(inst->THRCTS, i) && IS_BIT_SET(inst->THRCTS, in adc_npcx_isr()
/Zephyr-latest/include/zephyr/sys/
Dutil_macro.h102 #define IS_BIT_SET(value, bit) ((((value) >> (bit)) & (0x1)) != 0) macro
/Zephyr-latest/drivers/clock_control/
Dclock_control_npcx.c227 while (IS_BIT_SET(inst_cdcg->HFCGCTRL, NPCX_HFCGCTRL_CLK_CHNG)) { in npcx_clock_control_init()
/Zephyr-latest/drivers/dai/intel/ssp/
Dssp.c868 if (IS_BIT_SET(cfg->link_config, 15)) { in dai_ssp_program_channel_map()
884 if (IS_BIT_SET(cfg->link_config, 15)) { in dai_ssp_program_channel_map()