Searched refs:ECREG (Results 1 – 4 of 4) sorted by relevance
14 #define ECREG(x) x macro20 #define ECREG(x) (*((volatile unsigned char *)(x))) macro50 #define IT8XXX2_GCTRL_EIDSR ECREG(IT8XXX2_GCTRL_BASE + 0x31)51 #define IT8XXX2_GCTRL_PMER3 ECREG(IT8XXX2_GCTRL_BASE + 0x46)59 #define IT8XXX2_JTAG_PINS_BASE ECREG(0xF01660)60 #define IT8XXX2_JTAG_VOLT_SET ECREG(0xF01648)62 #define IT8XXX2_JTAG_PINS_BASE ECREG(0xF01610)63 #define IT8XXX2_JTAG_VOLT_SET ECREG(0xF016e9)69 #define IT8XXX2_EGPIO_EGCR ECREG(IT8XXX2_EGPIO_BASE + 0x04)85 #define ISR0 ECREG(EC_REG_BASE_ADDR + 0x3F00)[all …]
97 ECREG(reg_gpcr) = GPCR_PORT_PIN_MODE_TRISTATE; in gpio_ite_configure()102 if (ECREG(reg_gpcr) != GPCR_PORT_PIN_MODE_TRISTATE) { in gpio_ite_configure()104 ECREG(reg_gpcr) = GPCR_PORT_PIN_MODE_INPUT; in gpio_ite_configure()123 ECREG(reg_gpotr) |= mask; in gpio_ite_configure()125 ECREG(reg_gpotr) &= ~mask; in gpio_ite_configure()135 ECREG(reg_p18scr) |= mask; in gpio_ite_configure()138 ECREG(reg_p18scr) &= ~mask; in gpio_ite_configure()146 ECREG(reg_p18scr) &= ~mask; in gpio_ite_configure()157 ECREG(reg_gpdr) |= mask; in gpio_ite_configure()159 ECREG(reg_gpdr) &= ~mask; in gpio_ite_configure()[all …]
12 #undef ECREG15 #define ECREG(x) (*((volatile unsigned char *)fake_ecreg((intptr_t)x))) macro
20 #define IT8XXX2_INTC_ISR(g) ECREG(IT8XXX2_INTC_BASE_SHIFT(g) + \23 #define IT8XXX2_INTC_IER(g) ECREG(IT8XXX2_INTC_BASE_SHIFT(g) + \26 #define IT8XXX2_INTC_IELMR(g) ECREG(IT8XXX2_INTC_BASE_SHIFT(g) + \29 #define IT8XXX2_INTC_IPOLR(g) ECREG(IT8XXX2_INTC_BASE_SHIFT(g) + \
