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Searched refs:ADSP_DSPWCT0C_OFFSET (Results 1 – 5 of 5) sorted by relevance

/Zephyr-latest/drivers/timer/
Dintel_adsp_timer.c54 #define DSPWCT0C_LO_ADDR (SYSCON_REG_ADDR + ADSP_DSPWCT0C_OFFSET)
55 #define DSPWCT0C_HI_ADDR (SYSCON_REG_ADDR + ADSP_DSPWCT0C_OFFSET + 4)
/Zephyr-latest/soc/intel/intel_adsp/ace/include/ace15_mtpm/
Dadsp_shim.h129 #define ADSP_DSPWCT0C_OFFSET 0x30 macro
/Zephyr-latest/soc/intel/intel_adsp/ace/include/ace20_lnl/
Dadsp_shim.h129 #define ADSP_DSPWCT0C_OFFSET 0x30 macro
/Zephyr-latest/soc/intel/intel_adsp/ace/include/ace30/
Dadsp_shim.h80 #define ADSP_DSPWCT0C_OFFSET 0x30 macro
/Zephyr-latest/soc/intel/intel_adsp/cavs/include/cavs25/
Dadsp_shim.h60 #define ADSP_DSPWCT0C_OFFSET 0x30 macro