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Searched refs:ICACHE_SYNC0_INTR_SOURCE (Results 1 – 3 of 3) sorted by relevance

/Zephyr-latest/include/zephyr/dt-bindings/interrupt-controller/
Desp-esp32c2-intmux.h41 #define ICACHE_SYNC0_INTR_SOURCE 31 macro
Desp-esp32c3-intmux.h52 #define ICACHE_SYNC0_INTR_SOURCE 42 macro
Desp32s3-xtensa-intmux.h70 #define ICACHE_SYNC0_INTR_SOURCE 64 /* interrupt of instr. cache sync done, LEVEL*/ macro