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Searched refs:DMA_IN_CH0_INTR_SOURCE (Results 1 – 4 of 4) sorted by relevance

/Zephyr-latest/include/zephyr/dt-bindings/interrupt-controller/
Desp-esp32c6-intmux.h76 #define DMA_IN_CH0_INTR_SOURCE 66 /* interrupt of general DMA IN channel 0, LEVEL*/ macro
Desp32s3-xtensa-intmux.h72 #define DMA_IN_CH0_INTR_SOURCE 66 /* interrupt of general DMA RX channel 0, LEVEL*/ macro
/Zephyr-latest/dts/riscv/espressif/esp32c6/
Desp32c6_common.dtsi196 <DMA_IN_CH0_INTR_SOURCE IRQ_DEFAULT_PRIORITY 0>,
/Zephyr-latest/dts/xtensa/espressif/esp32s3/
Desp32s3_common.dtsi507 <DMA_IN_CH0_INTR_SOURCE IRQ_DEFAULT_PRIORITY ESP_INTR_FLAG_SHARED>,