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12

/Zephyr-latest/tests/drivers/spi/spi_controller_peripheral/boards/
Dek_ra8m1.overlay3 * SPDX-License-Identifier: Apache-2.0
36 rx-dtc;
37 tx-dtc;
39 pinctrl-0 = <&spi0_default_alt>;
40 pinctrl-names = "default";
41 cs-gpios = <&ioport7 3 GPIO_ACTIVE_LOW>;
42 dut_spi_dt: test-spi-dev@0 {
43 compatible = "vnd,spi-device";
45 spi-max-frequency = <1000000>;
50 rx-dtc;
[all …]
/Zephyr-latest/tests/drivers/spi/spi_loopback/boards/
Dek_ra2a1.overlay3 * SPDX-License-Identifier: Apache-2.0
7 rx-dtc;
8 tx-dtc;
10 compatible = "test-spi-loopback-slow";
12 spi-max-frequency = <2000000>;
15 compatible = "test-spi-loopback-fast";
17 spi-max-frequency = <3000000>;
Dek_ra4e2.overlay3 * SPDX-License-Identifier: Apache-2.0
7 rx-dtc;
8 tx-dtc;
10 compatible = "test-spi-loopback-slow";
12 spi-max-frequency = <2000000>;
15 compatible = "test-spi-loopback-fast";
17 spi-max-frequency = <3000000>;
Dek_ra4m2.overlay3 * SPDX-License-Identifier: Apache-2.0
7 rx-dtc;
8 tx-dtc;
10 compatible = "test-spi-loopback-slow";
12 spi-max-frequency = <2000000>;
15 compatible = "test-spi-loopback-fast";
17 spi-max-frequency = <3000000>;
Dek_ra4m3.overlay3 * SPDX-License-Identifier: Apache-2.0
7 rx-dtc;
8 tx-dtc;
10 compatible = "test-spi-loopback-slow";
12 spi-max-frequency = <2000000>;
15 compatible = "test-spi-loopback-fast";
17 spi-max-frequency = <3000000>;
Dek_ra4w1.overlay3 * SPDX-License-Identifier: Apache-2.0
7 rx-dtc;
8 tx-dtc;
10 compatible = "test-spi-loopback-slow";
12 spi-max-frequency = <2000000>;
15 compatible = "test-spi-loopback-fast";
17 spi-max-frequency = <3000000>;
Dek_ra6e2.overlay3 * SPDX-License-Identifier: Apache-2.0
7 rx-dtc;
8 tx-dtc;
10 compatible = "test-spi-loopback-slow";
12 spi-max-frequency = <2000000>;
15 compatible = "test-spi-loopback-fast";
17 spi-max-frequency = <3000000>;
Dek_ra6m1.overlay3 * SPDX-License-Identifier: Apache-2.0
7 rx-dtc;
8 tx-dtc;
10 compatible = "test-spi-loopback-slow";
12 spi-max-frequency = <2000000>;
15 compatible = "test-spi-loopback-fast";
17 spi-max-frequency = <3000000>;
Dek_ra6m2.overlay3 * SPDX-License-Identifier: Apache-2.0
7 rx-dtc;
8 tx-dtc;
10 compatible = "test-spi-loopback-slow";
12 spi-max-frequency = <2000000>;
15 compatible = "test-spi-loopback-fast";
17 spi-max-frequency = <3000000>;
Dek_ra6m3.overlay3 * SPDX-License-Identifier: Apache-2.0
7 rx-dtc;
8 tx-dtc;
10 compatible = "test-spi-loopback-slow";
12 spi-max-frequency = <2000000>;
15 compatible = "test-spi-loopback-fast";
17 spi-max-frequency = <3000000>;
Dek_ra6m4.overlay3 * SPDX-License-Identifier: Apache-2.0
7 rx-dtc;
8 tx-dtc;
10 compatible = "test-spi-loopback-slow";
12 spi-max-frequency = <2000000>;
15 compatible = "test-spi-loopback-fast";
17 spi-max-frequency = <3000000>;
Dek_ra6m5.overlay3 * SPDX-License-Identifier: Apache-2.0
7 rx-dtc;
8 tx-dtc;
10 compatible = "test-spi-loopback-slow";
12 spi-max-frequency = <2000000>;
15 compatible = "test-spi-loopback-fast";
17 spi-max-frequency = <3000000>;
Dek_ra8d1.overlay3 * SPDX-License-Identifier: Apache-2.0
7 rx-dtc;
8 tx-dtc;
10 compatible = "test-spi-loopback-slow";
12 spi-max-frequency = <2000000>;
16 compatible = "test-spi-loopback-fast";
18 spi-max-frequency = <3000000>;
Dfpb_ra6e1.overlay3 * SPDX-License-Identifier: Apache-2.0
7 rx-dtc;
8 tx-dtc;
10 compatible = "test-spi-loopback-slow";
12 spi-max-frequency = <2000000>;
15 compatible = "test-spi-loopback-fast";
17 spi-max-frequency = <3000000>;
Dfpb_ra6e2.overlay3 * SPDX-License-Identifier: Apache-2.0
7 rx-dtc;
8 tx-dtc;
10 compatible = "test-spi-loopback-slow";
12 spi-max-frequency = <2000000>;
15 compatible = "test-spi-loopback-fast";
17 spi-max-frequency = <3000000>;
Dmck_ra8t1.overlay3 * SPDX-License-Identifier: Apache-2.0
7 rx-dtc;
8 tx-dtc;
10 compatible = "test-spi-loopback-slow";
12 spi-max-frequency = <2000000>;
16 compatible = "test-spi-loopback-fast";
18 spi-max-frequency = <3000000>;
Dek_ra8m1.overlay3 * SPDX-License-Identifier: Apache-2.0
6 #include <zephyr/dt-bindings/clock/ra_clock.h>
21 rx-dtc;
22 tx-dtc;
23 pinctrl-0 = <&spi0_default>;
24 pinctrl-names = "default";
27 compatible = "test-spi-loopback-slow";
29 spi-max-frequency = <2000000>;
32 compatible = "test-spi-loopback-fast";
34 spi-max-frequency = <3000000>;
/Zephyr-latest/dts/bindings/spi/
Drenesas,ra-spi.yaml2 # SPDX-License-Identifier: Apache-2.0
6 compatible: "renesas,ra-spi"
8 include: [spi-controller.yaml, pinctrl-device.yaml]
18 tx-dtc:
21 rx-dtc:
24 pinctrl-0:
27 pinctrl-names:
33 interrupt-names:
Drenesas,ra8-spi-b.yaml2 # SPDX-License-Identifier: Apache-2.0
6 compatible: "renesas,ra8-spi-b"
8 include: [spi-controller.yaml, pinctrl-device.yaml]
21 tx-dtc:
24 rx-dtc:
27 pinctrl-0:
30 pinctrl-names:
36 interrupt-names:
/Zephyr-latest/drivers/spi/
Dspi_renesas_ra.c3 * SPDX-License-Identifier: Apache-2.0
48 /* TX */
59 struct device *dev = (struct device *)p_args->p_context; in spi_cb()
60 struct ra_spi_data *data = dev->data; in spi_cb()
62 switch (p_args->event) { in spi_cb()
64 spi_context_cs_control(&data->ctx, false); in spi_cb()
65 spi_context_complete(&data->ctx, dev, 0); in spi_cb()
73 spi_context_cs_control(&data->ctx, false); in spi_cb()
74 spi_context_complete(&data->ctx, dev, -EIO); in spi_cb()
83 struct ra_spi_data *data = dev->data; in ra_spi_configure()
[all …]
Dspi_b_renesas_ra8.c4 * SPDX-License-Identifier: Apache-2.0
52 /* TX */
63 struct device *dev = (struct device *)p_args->p_context; in spi_cb()
64 struct ra_spi_data *data = dev->data; in spi_cb()
66 switch (p_args->event) { in spi_cb()
68 spi_context_cs_control(&data->ctx, false); in spi_cb()
69 spi_context_complete(&data->ctx, dev, 0); in spi_cb()
77 spi_context_cs_control(&data->ctx, false); in spi_cb()
78 spi_context_complete(&data->ctx, dev, -EIO); in spi_cb()
87 struct ra_spi_data *data = dev->data; in ra_spi_b_configure()
[all …]
/Zephyr-latest/boards/phytec/phyboard_polis/doc/
Dindex.rst3 phyBOARD-Polis i.MX8M Mini
9 The phyBOARD-Polis, either a development platform for the
10 phyCORE-i.MX 8M Mini/Nano, or a powerful, industry-compatible single-board
12 platform, the phyBOARD-Polis serves as reference design for your
13 customer-specific application and enables parallel development of the software
14 and carrier board for the phyCORE-i.MX 8M Mini/Nano.
17 As a powerful, industrial single-board computer (SBC), the phyBOARD-Polis is
20 phyCORE-i.MX 8M Mini/Nano features such as CAN FD, WLAN and an integrated
22 the phyCORE-i.MX 8M Mini/Nano.
24 - Board features:
[all …]
/Zephyr-latest/drivers/serial/
Duart_renesas_ra8_sci_b.c3 * SPDX-License-Identifier: Apache-2.0
61 /* TX */
80 const struct uart_ra_sci_b_config *cfg = dev->config; in uart_ra_sci_b_poll_in()
83 if (IS_ENABLED(CONFIG_UART_ASYNC_API) && cfg->regs->CCR0_b.RIE) { in uart_ra_sci_b_poll_in()
84 return -EBUSY; in uart_ra_sci_b_poll_in()
87 if (IS_ENABLED(CONFIG_UART_RA_SCI_B_UART_FIFO_ENABLE) ? cfg->regs->FRSR_b.R == 0U in uart_ra_sci_b_poll_in()
88 : cfg->regs->CSR_b.RDRF == 0U) { in uart_ra_sci_b_poll_in()
90 return -1; in uart_ra_sci_b_poll_in()
94 *c = (unsigned char)cfg->regs->RDR; in uart_ra_sci_b_poll_in()
101 const struct uart_ra_sci_b_config *cfg = dev->config; in uart_ra_sci_b_poll_out()
[all …]
/Zephyr-latest/boards/toradex/colibri_imx7d/doc/
Dindex.rst6 The i.MX7 SoC is a Hybrid multi-core processor composed by Single/Dual Cortex A7
14 - i.MX7 Single/Dual Cortex A7 (800MHz/1.0GHz) core and Single Cortex M4 (200MHz) core
16 - Memory
18 - RAM -> A7: 256MB, 512MB and 1GB
19 - RAM -> M4: 3x32KB (TCML, TCMU, OCRAM_S), 1x128KB (OCRAM) and 1x256MB (DDR)
20 - Flash -> A7: 4Gb eMMC and 512Mb NAND
22 - Display
24 - RGB 1920x1080x24bpp
25 - 4-wire Resistive touch
27 - Multimedia
[all …]
/Zephyr-latest/doc/releases/
Drelease-notes-1.13.rst16 * Support for IEEE 802.1AS-2011 generalized Precision Time Protocol (gPTP)
17 * Link Layer Discovery Protocol (LLDP) TX support
23 * Basic support for Arm TrustZone in Armv8-M
42 * arch: arm: implement ARMv8-M MPU driver
44 * arch: arm: macro API for defining non-secure entry functions
48 * arch: ARM: Change the march used by cortex-m0 and cortex-m0plus
50 * arch: arm: basic Arm TrustZone-M functionality for Cortex-M23 and Cortex-M33
51 * arch: arm: built-in stack protection using Armv8-M SPLIM registers
52 * arch: arm: API for using TT intrinsics in Secure/Non-Secure Armv8-M firmware
63 * riscv32: riscv-privilege: Microsemi Mi-V support
[all …]

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