| /Zephyr-latest/arch/x86/include/ |
| D | x86_mmu.h | 78 * @param ptables Page tables to walk
89 * @param ptables Toplevel pointer to page tables
96 * Debug function for dumping out page tables
118 * @param ptables Top-level pointer to the page tables, as programmed in CR3
125 * kernel's page tables to prevent writes and generate an exception
139 /* Called from page fault handler. ptables here is the ptage tables for the
140 * faulting user thread and not the current set of page tables
154 * structure here or the CPU will triple fault. The incoming page tables must in z_x86_kpti_is_access_ok()
160 __ASSERT((phys & PTABLES_ALIGN) == 0U, "unaligned page tables"); in z_x86_kpti_is_access_ok()
169 * current set of page tables
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| /Zephyr-latest/tests/arch/arm64/arm64_mmu/src/ |
| D | main.c | 34 TC_PRINT(" Total page tables: %d\n", CONFIG_MAX_XLAT_TABLES); in arm64_mmu_test_init()
35 TC_PRINT(" Initial free tables: %d\n", initial_nb_free_tables); in arm64_mmu_test_init()
58 TC_PRINT(" current free tables: %d\n", mapped_nb_free_tables); in mem_map_test()
72 TC_PRINT(" current free tables: %d\n", unmapped_nb_free_tables); in mem_map_test()
88 * multiple tables to reach the deepest level. in ZTEST()
96 zassert_true(tables_used == 2, "used %d tables", tables_used); in ZTEST()
113 zassert_true(tables_used == 1, "used %d tables", tables_used); in ZTEST()
132 zassert_true(tables_used == 2, "used %d tables", tables_used); in ZTEST()
151 zassert_true(tables_used == 2, "used %d tables", tables_used); in ZTEST()
171 TC_PRINT(" current free tables: %d\n", mapped_nb_free_tables); in ZTEST()
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| /Zephyr-latest/kernel/include/ |
| D | kernel_arch_interface.h | 289 * will be established. If the page tables already had mappings installed
301 * Architectures are expected to pre-allocate page tables for the entire
325 * page tables.
334 * and it is not necessary to free any paging structures. Empty page tables
349 * The function only needs to query the current set of page tables as
351 * page tables are in use. If multiple page tables are active it is unnecessary
355 * across all page tables. Calling this function on data pages that are
357 * Just check the currently installed page tables and return the information
382 * Update all page tables for a paged-out data page
392 * If multiple page tables are in use, this must update all page tables.
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| /Zephyr-latest/arch/x86/ |
| D | gen_mmu.py | 7 """Create the kernel's page tables for x86 CPUs.
12 This script produces the initial page tables installed into the CPU
50 Because the set of page tables are linked together by physical address,
53 tables will be placed, and this memory address must not shift between
57 64-bit systems will always build IA-32e page tables. 32-bit systems
58 build PAE page tables if CONFIG_X86_PAE is set, otherwise standard
59 32-bit page tables are built.
62 page tables at the physical address corresponding to the symbol
184 """Represents a particular table in a set of page tables, at any level"""
336 """Represents a complete set of page tables for any paging mode"""
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| D | Kconfig | 311 and creates a set of page tables at boot time that is runtime-
322 own page tables. Instead, context switching operations will modify
323 page tables in place. This is much slower, but uses much less RAM
324 for page tables.
331 The initial page tables at boot are pre-allocated, and used for the
333 if common page tables are in use requires a pool of free pinned
334 memory pages for constructing page tables.
448 increase for additional page tables and trampoline stacks.
468 used by the firmware environment and its page tables be
|
| /Zephyr-latest/lib/cpp/minimal/ |
| D | cpp_vtable.cpp | 9 * @brief Stub for C++ virtual tables
14 * @brief basic virtual tables required for classes to build
|
| /Zephyr-latest/arch/arm/core/mmu/ |
| D | Kconfig | 22 int "Number of L2 translation tables available to the MMU"
25 Number of level 2 translation tables. Each level 2 table
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| /Zephyr-latest/modules/acpica/ |
| D | CMakeLists.txt | 132 ${COMP_DIR}/tables/tbdata.c
133 ${COMP_DIR}/tables/tbfadt.c
134 ${COMP_DIR}/tables/tbfind.c
135 ${COMP_DIR}/tables/tbinstal.c
136 ${COMP_DIR}/tables/tbprint.c
137 ${COMP_DIR}/tables/tbutils.c
138 ${COMP_DIR}/tables/tbxface.c
139 ${COMP_DIR}/tables/tbxfload.c
140 ${COMP_DIR}/tables/tbxfroot.c
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| /Zephyr-latest/tests/arch/arm64/arm64_gicv3_its/boards/ |
| D | fvp_base_revc_2xaemv8a.conf | 12 # 256bytes aligned tables, for reference a 32 ITEs table needs 256bytes.
14 # To permit allocating 256 ITT tables of 32 ITEs, 13x64K HEAP_MEM is needed
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| /Zephyr-latest/boards/arm/fvp_base_revc_2xaemv8a/ |
| D | Kconfig | 15 # 256bytes aligned tables, for reference a 32 ITEs table needs 256bytes.
16 # With 11x64K HEAP, up to 116 ITT tables of 32 ITEs can be allocated.
|
| /Zephyr-latest/arch/x86/core/ |
| D | x86_mmu.c | 30 * partitions to page tables when the partitions are removed.
65 * sure all memory mappings are the same across all page tables when invoking
186 * Macros for reserving space for page tables
188 * We need to reserve a block of memory equal in size to the page tables
217 * covered by all the page tables needed for the address space
222 /* Number of page tables needed to cover address space. Depends on the specific
238 /* 32-bit page tables just have one toplevel page directory */
243 /* Same semantics as above, but for the page directory pointer tables needed
251 /* All pages needed for page tables, using computed values plus one more for
256 /* Number of pages we need to reserve in the stack for per-thread page tables */
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| D | userspace.c | 30 * active page tables are the kernel's page tables. If the incoming thread is
31 * in user mode we are going to switch CR3 to the domain-specific tables when
37 * switching page tables.
57 __ASSERT(ptables_phys != 0, "NULL page tables for thread %p\n", in z_x86_swap_update_page_tables()
|
| D | Kconfig.ia32 | 89 bool "Use PAE page tables"
93 If enabled, use PAE-style page tables instead of 32-bit page tables.
|
| /Zephyr-latest/arch/common/ |
| D | Kconfig | 35 bool "Shell command to dump the ISR tables"
39 This option enables a shell command to dump the ISR tables.
|
| D | isr_tables.c | 27 * the vector and sw isr tables,
41 /* These are placeholder tables. They will be replaced by the real tables
|
| D | sw_isr_common.c | 13 * Common code for arches that use software ISR tables (CONFIG_GEN_ISR_TABLES)
|
| /Zephyr-latest/doc/hardware/arch/ |
| D | x86.rst | 15 During very early boot, page tables are loaded so technically the kernel
80 the necessary multi-level page tables for code execution and data access
119 space for the pre-allocated page tables (both kernel and per-domain
120 tables). :kconfig:option:`CONFIG_X86_EXTRA_PAGE_TABLE_PAGES` is needed to
121 specify how many more memory pages to be reserved for the page tables.
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| /Zephyr-latest/arch/xtensa/ |
| D | Kconfig | 205 int "Number of L1 page tables"
209 This option specifies the maximum number of traslation tables.
210 Translation tables are directly related to the number of
214 int "Number of L2 page tables"
230 memory domain when swapping page tables.
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| /Zephyr-latest/include/zephyr/arch/xtensa/ |
| D | xtensa_mmu.h | 140 * invalidate cache to page tables and flush TLBs. This is
141 * needed when one processor is updating page tables that
149 * @brief Invalidate cache to page tables and flush TLBs.
151 * This invalidates cache to all page tables and flush TLBs
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| /Zephyr-latest/drivers/flash/ |
| D | Kconfig.nxp_s32 | 26 tables to configure Quad mode. Otherwise it defaults to Dual or
28 - Soft Reset bitfield (DW16) must be present in the SFDP tables to
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| /Zephyr-latest/include/zephyr/sys/internal/ |
| D | kobject_internal.h | 104 * allocated memory in the kernel object lookup tables with type K_OBJ_ANY.
118 * kernel object tables
129 * allocated memory in the kernel object lookup tables with type K_OBJ_ANY.
142 * kernel object tables
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| /Zephyr-latest/arch/arm64/core/ |
| D | Kconfig | 353 int "Maximum numbers of translation tables"
359 This option specifies the maximum numbers of translation tables.
360 Based on this, translation tables are allocated at compile time and
362 numbers of translation tables, it will result in assert. Number of
363 translation tables required is decided based on how many discrete
|
| /Zephyr-latest/kernel/ |
| D | Kconfig.mem_domain | 27 Typical uses might be a set of page tables for that memory domain.
53 tables, these APIs don't need to be implemented as the underlying
|
| /Zephyr-latest/boards/qemu/x86/ |
| D | qemu_x86_atom_nopae.yaml | 2 name: QEMU Emulation for X86 (32-bit page tables)
|
| /Zephyr-latest/arch/xtensa/core/ |
| D | ptables.c | 19 /* Skip TLB IPI when updating page tables.
61 * That is an alias for the page tables set used by the kernel.
73 * This additional variable tracks which l1 tables are in use. This is kept separated from
74 * the tables to keep alignment easier.
76 * @note: The first bit is set because it is used for the kernel page tables.
81 * This additional variable tracks which l2 tables are in use. This is kept separated from
82 * the tables to keep alignment easier.
87 * Protects xtensa_domain_list and serializes access to page tables.
292 /* Finally, the direct-mapped pages used in the page tables in xtensa_init_page_tables()
665 * switching until all the page tables are updated. in xtensa_mmu_tlb_shootdown()
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