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/Zephyr-latest/samples/drivers/spi_flash/
DREADME.rst1 .. zephyr:code-sample:: spi-nor
2 :name: JEDEC SPI-NOR flash
3 :relevant-api: flash_interface
5 Use the flash API to interact with an SPI NOR serial flash memory device.
10 This sample demonstrates using the :ref:`flash API <flash_api>` on a SPI NOR serial flash
21 * :dtcompatible:`jedec,spi-nor`,
22 * :dtcompatible:`st,stm32-qspi-nor`,
23 * :dtcompatible:`st,stm32-ospi-nor`,
24 * :dtcompatible:`nordic,qspi-nor`.
26 .. zephyr-app-commands::
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Dsample.yaml2 name: SPI Flash Sample
4 sample.drivers.spi.flash:
6 - spi
7 - flash
8 filter: dt_compat_enabled("jedec,spi-nor") or dt_compat_enabled("st,stm32-qspi-nor")
9 or dt_compat_enabled("st,stm32-ospi-nor") or dt_compat_enabled("st,stm32-xspi-nor")
10 or (dt_compat_enabled("nordic,qspi-nor") and CONFIG_NORDIC_QSPI_NOR)
12 - hifive_unmatched/fu740/s7
13 - hifive_unmatched/fu740/u74
19 - "Test 1: Flash erase"
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/Zephyr-latest/dts/bindings/flash_controller/
Dnuvoton,npcx-fiu-nor.yaml2 # SPDX-License-Identifier: Apache-2.0
5 The SPI NOR flash devices accessed by Nuvoton Flash Interface Unit (FIU).
7 Representation of a SPI NOR flash on a qspi bus looks like:
10 compatible ="nuvoton,npcx-fiu-nor";
14 qspi-flags = <NPCX_QSPI_SW_CS1>;
15 mapped-addr = <0x64000000>;
16 pinctrl-0 = <&int_flash_sl>;
17 pinctrl-names = "default";
20 compatible: "nuvoton,npcx-fiu-nor"
22 include: [flash-controller.yaml, pinctrl-device.yaml, "jedec,spi-nor-common.yaml"]
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Dst,stm32-xspi-nor.yaml1 # Copyright (c) 2021 - 2024 STMicroelectronics
2 # SPDX-License-Identifier: Apache-2.0
9 mx25lm51245: xspi-nor-flash@70000000 {
10 compatible = "st,stm32-xspi-nor";
12 data-mode = <XSPI_OCTO_MODE>; /* access on 8 data lines */
13 data-rate = <XSPI_DTR_TRANSFER>; /* access in DTR */
14 ospi-max-frequency = <DT_FREQ_M(50)>;
18 compatible: "st,stm32-xspi-nor"
21 - name: st,stm32-ospi-nor.yaml
22 property-blocklist:
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Dst,stm32-qspi-nor.yaml2 # SPDX-License-Identifier: Apache-2.0
9 mx25r6435f: qspi-nor-flash@90000000 {
10 compatible = "st,stm32-qspi-nor";
12 qspi-max-frequency = <80000000>;
13 reset-gpios = <&gpiod 3 GPIO_ACTIVE_LOW>;
14 reset-gpios-duration = <1>;
15 spi-bus-width = <4>;
19 compatible: "st,stm32-qspi-nor"
21 include: ["flash-controller.yaml", "jedec,jesd216.yaml"]
23 on-bus: qspi
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Dcdns,qspi-nor.yaml2 # SPDX-License-Identifier: Apache-2.0
4 description: Cadence Quad-SPI NOR flash controller
6 compatible: "cdns,qspi-nor"
8 include: flash-controller.yaml
11 clock-frequency:
14 description: clock frequency information for Cadence QSPI NOR Flash
Dst,stm32-ospi-nor.yaml2 # SPDX-License-Identifier: Apache-2.0
9 mx25lm51245: ospi-nor-flash@70000000 {
10 compatible = "st,stm32-ospi-nor";
12 data-mode = <OSPI_OPI_MODE>; /* access on 8 data lines */
13 data-rate = <OSPI_DTR_TRANSFER>; /* access in DTR */
14 ospi-max-frequency = <DT_FREQ_M(50)>;
18 compatible: "st,stm32-ospi-nor"
20 include: ["flash-controller.yaml", "jedec,jesd216.yaml"]
22 on-bus: ospi
28 ospi-max-frequency:
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/Zephyr-latest/include/zephyr/drivers/flash/
Dnpcx_flash_api_ex.h4 * SPDX-License-Identifier: Apache-2.0
20 * Execute a SPI transaction via User Mode Access (UMA) mode. Users can
21 * perform a customized SPI transaction to gread or write the device's
22 * configuration such as status registers of nor flash, power on/off,
27 * NPCX Configure specific operation for Quad-SPI nor flash.
29 * It configures specific operation for Quad-SPI nor flash such as lock
35 * NPCX Get specific operation for Quad-SPI nor flash.
37 * It returns current specific operation for Quad-SPI nor flash.
/Zephyr-latest/samples/drivers/jesd216/
Dsample.yaml5 - spi
6 - flash
12 - "sfdp-bfp ="
13 - "jedec-id ="
17 - hifive1
18 - hifive_unleashed/fu540/e51
19 - hifive_unleashed/fu540/u54
20 - hifive_unmatched/fu740/s7
21 - hifive_unmatched/fu740/u74
22 - mimxrt1170_evk/mimxrt1176/cm7
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/Zephyr-latest/dts/bindings/mtd/
Djedec,spi-nor.yaml3 # SPDX-License-Identifier: Apache-2.0
6 Properties supporting Zephyr spi-nor flash driver (over the Zephyr SPI
7 API) control of serial flash memories using the standard M25P80-based
10 compatible: "jedec,spi-nor"
12 include: [spi-device.yaml, "jedec,spi-nor-common.yaml"]
15 wp-gpios:
16 type: phandle-array
18 hold-gpios:
19 type: phandle-array
21 reset-gpios:
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Dnordic,qspi-nor.yaml2 # SPDX-License-Identifier: Apache-2.0
5 QSPI NOR flash supporting the JEDEC CFI interface.
7 compatible: "nordic,qspi-nor"
9 include: [base.yaml, "jedec,spi-nor-common.yaml"]
11 on-bus: qspi
17 jedec-id:
23 The size in bits. Set this or size-in-bytes, but not both.
25 size-in-bytes:
31 quad-enable-requirements:
37 - "fastread" # Single data line SPI, FAST_READ (0x0B)
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Dandestech,qspi-nor.yaml4 # SPDX-License-Identifier: Apache-2.0
7 compatible: "andestech,qspi-nor"
10 Properties supporting Zephyr qspi-nor flash driver control of
11 flash memories using the standard M25P80-based command set.
13 include: "jedec,spi-nor-common.yaml"
16 wp-gpios:
17 type: phandle-array
20 hold-gpios:
21 type: phandle-array
24 reset-gpios:
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/Zephyr-latest/boards/microchip/mpfs_icicle/
Dmpfs_icicle_common.dtsi2 * Copyright (c) 2020-2021 Microchip Technology Inc
4 * SPDX-License-Identifier: Apache-2.0
7 /dts-v1/;
9 #include <zephyr/dt-bindings/input/input-event-codes.h>
13 model = "microchip,mpfs-icicle-kit";
14 compatible = "microchip,mpfs-icicle-kit", "microchip,mpfs";
23 compatible = "gpio-leds";
32 compatible = "gpio-keys";
43 current-speed = <115200>;
44 clock-frequency = <150000000>;
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/Zephyr-latest/tests/drivers/build_all/flash/
Dspi.dtsi3 * SPDX-License-Identifier: Apache-2.0
10 spi-max-frequency = <5000000>;
11 jedec-id = [00 11 22];
13 sector-size = <1>;
14 sector-0a-pages = <1>;
15 block-size = <1>;
16 page-size = <1>;
19 spi-nor@1 {
20 compatible = "jedec,spi-nor";
23 spi-max-frequency = <5000000>;
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/Zephyr-latest/boards/shields/v2c_daplink/
Dv2c_daplink.overlay4 * SPDX-License-Identifier: Apache-2.0
17 * Disable the on-board flash until the jedec,spi-nor driver supports
27 compatible = "spansion,s25fl128s", "jedec,spi-nor";
29 spi-max-frequency = <80000000>;
31 jedec-id = [01 20 18];
39 compatible = "zephyr,sdhc-spi-slot";
41 spi-max-frequency = <25000000>;
43 compatible = "zephyr,sdmmc-disk";
44 disk-name = "SD";
/Zephyr-latest/drivers/flash/
DKconfig.npcx_fiu4 # SPDX-License-Identifier: Apache-2.0
16 bool "Nuvoton NPCX embedded controller (EC) QSPI NOR Flash driver"
26 This option enables the QSPI NOR Flash driver for NPCX family of
32 bool "QSPI NOR flash feature during driver initialization"
36 This option enables the QSPI NOR Flash features such as Quad-Enable,
37 4-byte address support and so on during driver initialization. Disable
38 it if QSPI NOR devices are not ready during driver initialization.
65 Selected if NPCX series supports two external SPI devices in Direct
DKconfig.nor1 # Copyright (c) 2018 Savoir-Faire Linux.
4 # SPDX-License-Identifier: Apache-2.0
7 bool "SPI NOR Flash"
15 select SPI
27 set by the page-size devicetree property) and
29 jedec-id properties in the devicetree jedec,spi-nor node.
35 sfdp-bfp property in devicetree. The size and jedec-id properties are
43 for all supported JESD216-compatible devices.
52 Device is connected to SPI bus, it has to
53 be initialized after SPI driver.
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DKconfig.stm32_qspi1 # STM32 Quad SPI flash driver configuration options
5 # SPDX-License-Identifier: Apache-2.0
10 bool "STM32 Quad SPI Flash driver"
23 Enable QSPI-NOR support on the STM32 family of processors.
DKconfig.cadence_qspi_nor2 # SPDX-License-Identifier: Apache-2.0
5 bool "Cadence Quad SPI Flash driver"
12 Enable Cadence QSPI-NOR support.
17 bool "Cadence Quad SPI Micron N25Q Support"
23 hex "Cadence Quad SPI subsector size"
26 Set the Cadence Quad SPI subsector size.
/Zephyr-latest/boards/fanke/fk7b0m1_vbt6/
Dfk7b0m1_vbt6.dts4 * SPDX-License-Identifier: Apache-2.0
7 /dts-v1/;
9 #include <st/h7/stm32h7b0vbtx-pinctrl.dtsi>
10 #include <zephyr/dt-bindings/memory-attr/memory-attr-arm.h>
11 #include <zephyr/dt-bindings/input/input-event-codes.h>
14 model = "FANKE FK7B0M1-VBT6 board";
15 compatible = "fanke,fk7b0m1-vbt6";
19 zephyr,shell-uart = &usart1;
25 compatible = "gpio-leds";
33 compatible = "gpio-keys";
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/Zephyr-latest/tests/drivers/flash/common/boards/
Dnrf52840dk_spi_nor_wp_hold.overlay4 * SPDX-License-Identifier: Apache-2.0
6 * Build test for jedec,spi-nor compatible (drivers/flash/spi_nor.c) wp-gpios and hold-gpios
9 /delete-node/ &mx25r64;
25 low-power-enable;
31 compatible = "nordic,nrf-spim";
33 cs-gpios = <&gpio0 13 GPIO_ACTIVE_LOW>; // mx25v16
34 pinctrl-0 = <&spi0_default>;
35 pinctrl-1 = <&spi0_sleep>;
36 pinctrl-names = "default", "sleep";
39 compatible = "jedec,spi-nor";
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Dnrf52840dk_spi_nor.overlay4 * SPDX-License-Identifier: Apache-2.0
6 * Build test for jedec,spi-nor compatible (drivers/flash/spi_nor.c)
9 /delete-node/ &mx25r64;
25 low-power-enable;
31 compatible = "nordic,nrf-spim";
33 cs-gpios = <&gpio0 13 GPIO_ACTIVE_LOW>; // mx25v16
34 pinctrl-0 = <&spi0_default>;
35 pinctrl-1 = <&spi0_sleep>;
36 pinctrl-names = "default", "sleep";
39 compatible = "jedec,spi-nor";
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/Zephyr-latest/dts/arm/nuvoton/
Dnpcx4m3f.dtsi4 * SPDX-License-Identifier: Apache-2.0
20 compatible = "mmio-sram";
24 soc-id {
25 device-id = <0x25>;
33 compatible ="nuvoton,npcx-fiu-nor";
38 /* quad spi bus configuration of nor flash device */
39 qspi-flags = <NPCX_QSPI_SW_CS0>;
40 mapped-addr = <0x60000000>;
Dnpcx4m8f.dtsi4 * SPDX-License-Identifier: Apache-2.0
20 compatible = "mmio-sram";
24 soc-id {
25 device-id = <0x23>;
33 compatible ="nuvoton,npcx-fiu-nor";
38 /* quad spi bus configuration of nor flash device */
39 qspi-flags = <NPCX_QSPI_SW_CS0>;
40 mapped-addr = <0x60000000>;
/Zephyr-latest/boards/weact/mini_stm32h7b0/
Dmini_stm32h7b0.dts4 * SPDX-License-Identifier: Apache-2.0
7 /dts-v1/;
9 #include <st/h7/stm32h7b0vbtx-pinctrl.dtsi>
10 #include <zephyr/dt-bindings/input/input-event-codes.h>
11 #include <zephyr/dt-bindings/mipi_dbi/mipi_dbi.h>
15 compatible = "weact,mini-stm32h7b0";
19 zephyr,shell-uart = &usb_cdc_acm_uart;
26 compatible = "gpio-leds";
34 compatible = "gpio-keys";
43 compatible = "zephyr,mipi-dbi-spi";
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