Searched +full:sosc +full:- +full:mode (Results 1 – 5 of 5) sorted by relevance
1 # Copyright (c) 2019-2021 Vestas Wind Systems A/S2 # SPDX-License-Identifier: Apache-2.06 compatible: "nxp,kinetis-scg"8 include: [clock-controller.yaml, base.yaml]14 sosc-mode:16 description: system oscillator mode18 "#clock-cells":21 clock-cells:22 - name
2 * Copyright (c) 2019-2021 Vestas Wind Systems A/S5 * Copyright (c) 2014-2015 Wind River Systems, Inc.8 * SPDX-License-Identifier: Apache-2.065 /* System Oscillator (SOSC) configuration */67 "Invalid SCG SOSC divider 1 value");69 "Invalid SCG SOSC divider 2 value");121 /* System Phase-Locked Loop (SPLL) configuration */144 .prediv = (SCG_CLOCK_DIV(pll) - 1U),145 .mult = (SCG_CLOCK_MULT(pll) - 16U)176 /* Only RUN mode supported for now */ in clk_init()[all …]
2 * Copyright (c) 2019-2021 Vestas Wind Systems A/S4 * SPDX-License-Identifier: Apache-2.07 /dts-v1/;10 #include <zephyr/dt-bindings/clock/kinetis_scg.h>11 #include <zephyr/dt-bindings/pwm/pwm.h>12 #include "twr_ke18f-pinctrl.dtsi"13 #include <zephyr/dt-bindings/input/input-event-codes.h>27 pwm-led0 = &orange_pwm_led;28 pwm-led1 = &yellow_pwm_led;29 pwm-led2 = &green_pwm_led;[all …]
2 * Copyright 2022-2024 NXP4 * SPDX-License-Identifier: Apache-2.079 * clock needs to be re-initialized on exit from Standby mode. Hence86 if ((PMU->CAU_SLP_CTRL & PMU_CAU_SLP_CTRL_SOC_SLP_RDY_MASK) == 0U) { in clock_init()90 if ((SYSCTL2->SOURCE_CLK_GATE & SYSCTL2_SOURCE_CLK_GATE_REFCLK_SYS_CG_MASK) != 0U) { in clock_init()107 /* First let M33 run on SOSC */ in clock_init()256 SYSCTL2->ANA_GRP_CTRL |= SYSCTL2_ANA_GRP_CTRL_PU_AG_MASK; in clock_init()
4 * SPDX-License-Identifier: Apache-2.08 #include "armv6-m.dtsi"9 #include <zephyr/dt-bindings/adc/adc.h>10 #include <zephyr/dt-bindings/clock/kinetis_pcc.h>11 #include <zephyr/dt-bindings/clock/kinetis_scg.h>12 #include <zephyr/dt-bindings/gpio/gpio.h>13 #include <zephyr/dt-bindings/i2c/i2c.h>17 zephyr,flash-controller = &ftfe;21 #address-cells = <1>;22 #size-cells = <0>;[all …]
