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/Zephyr-latest/dts/bindings/pwm/
Dinfineon,xmc4xxx-ccu8-pwm.yaml19 pwm_ccu81. Each module has four slices, and each slice has
23 The CCU8 modules use the CCU clock source. Each slice applies
25 defined by the 'slice-prescaler' property. Additionally, each
26 slice has a dead time prescaler, which divides the slice clock
38 slice-prescaler = <15 15 15 15>;
39 slice-deadtime-prescaler = <3 3 3 3>;
66 Note that a slice has two channels. Channels 0/1 are in slice 0,
67 channels 2/3 are in slice 1, and so on. Each channel can have its own
71 in the same slice.
90 slice-prescaler:
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Dinfineon,xmc4xxx-ccu4-pwm.yaml9 Each module has four slices and each slice has one channel.
14 The CCU4 modules uses the CCU clock source. Each slice applies a separate
24 The pwm ccu4 node must define the slice-prescaler values and the pinctrl nodes:
26 slice-prescaler = <15 15 15 15>;
69 slice-prescaler:
Draspberrypi,pico-pwm.yaml20 The integral part of the divider for pwm slice 0.
29 The fractional part of the divider for pwm slice 0.
/Zephyr-latest/drivers/pwm/
Dpwm_rpi_pico.c54 int slice = pwm_rpi_channel_to_slice(ch); in pwm_rpi_get_cycles_per_sec() local
62 const struct pwm_rpi_slice_config *slice_config = &cfg->slice_configs[slice]; in pwm_rpi_get_cycles_per_sec()
85 static void pwm_rpi_set_channel_polarity(const struct device *dev, int slice, in pwm_rpi_set_channel_polarity() argument
90 bool pwm_polarity_a = (cfg->pwm_controller->slice[slice].csr & PWM_CH0_CSR_A_INV_BITS) > 0; in pwm_rpi_set_channel_polarity()
91 bool pwm_polarity_b = (cfg->pwm_controller->slice[slice].csr & PWM_CH0_CSR_B_INV_BITS) > 0; in pwm_rpi_set_channel_polarity()
99 pwm_set_output_polarity(slice, pwm_polarity_a, pwm_polarity_b); in pwm_rpi_set_channel_polarity()
106 int slice = pwm_rpi_channel_to_slice(ch); in pwm_rpi_set_cycles() local
108 /* this is the channel within a pwm slice */ in pwm_rpi_set_cycles()
117 div_int = cfg->slice_configs[slice].integral; in pwm_rpi_set_cycles()
118 div_frac = cfg->slice_configs[slice].frac; in pwm_rpi_set_cycles()
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Dpwm_xmc4xxx_ccu4.c39 XMC_CCU4_SLICE_t *slice; in pwm_xmc4xxx_ccu4_init() local
44 slice = (XMC_CCU4_SLICE_t *)SLICE_ADDR_FROM_MODULE(config->ccu4, i); in pwm_xmc4xxx_ccu4_init()
45 XMC_CCU4_SLICE_CompareInit(slice, &slice_conf); in pwm_xmc4xxx_ccu4_init()
56 XMC_CCU4_SLICE_t *slice; in pwm_xmc4xxx_ccu4_set_cycles() local
67 slice = (XMC_CCU4_SLICE_t *)SLICE_ADDR_FROM_MODULE(config->ccu4, slice_idx); in pwm_xmc4xxx_ccu4_set_cycles()
68 slice->PRS = period_cycles - 1; in pwm_xmc4xxx_ccu4_set_cycles()
69 slice->CRS = period_cycles - pulse_cycles; in pwm_xmc4xxx_ccu4_set_cycles()
70 slice->PSL = flags & PWM_POLARITY_INVERTED; in pwm_xmc4xxx_ccu4_set_cycles()
76 XMC_CCU4_SLICE_StartTimer(slice); in pwm_xmc4xxx_ccu4_set_cycles()
Dpwm_xmc4xxx_ccu8.c45 XMC_CCU8_SLICE_t *slice; in pwm_xmc4xxx_ccu8_init() local
65 slice = (XMC_CCU8_SLICE_t *)SLICE_ADDR_FROM_MODULE(config->ccu8, i); in pwm_xmc4xxx_ccu8_init()
66 XMC_CCU8_SLICE_CompareInit(slice, &slice_conf); in pwm_xmc4xxx_ccu8_init()
81 XMC_CCU8_SLICE_DeadTimeInit(slice, &deadtime_conf); in pwm_xmc4xxx_ccu8_init()
92 XMC_CCU8_SLICE_t *slice; in pwm_xmc4xxx_ccu8_set_cycles() local
105 slice = (XMC_CCU8_SLICE_t *)SLICE_ADDR_FROM_MODULE(config->ccu8, slice_idx); in pwm_xmc4xxx_ccu8_set_cycles()
106 slice->PRS = period_cycles - 1; in pwm_xmc4xxx_ccu8_set_cycles()
109 slice->CR2S = period_cycles - pulse_cycles; in pwm_xmc4xxx_ccu8_set_cycles()
111 slice->CR1S = period_cycles - pulse_cycles; in pwm_xmc4xxx_ccu8_set_cycles()
113 slice->PSL = flags & PWM_POLARITY_INVERTED; in pwm_xmc4xxx_ccu8_set_cycles()
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/Zephyr-latest/tests/kernel/sched/schedule_api/src/
Dtest_slice_scheduling.c25 /* slice size in millisecond */
29 /* busy for more than one slice */
61 /* Test Fails if thread exceed allocated time slice or in thread_tslice()
69 /* Keep the current thread busy for more than one slice, in thread_tslice()
82 * time slice is disabled and enabled
85 * and few with same priorities and enable the time slice.
86 * Ensure that each thread is given the time slice period to execute.
113 /* enable time slice */ in ZTEST()
119 /* Keep the current thread busy for more than one slice, in ZTEST()
138 /* disable time slice */ in ZTEST()
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Dtest_sched_timeslice_reset.c16 /* slice size in millisecond */
18 /* busy for more than one slice */
84 TC_PRINT("thread[%d] elapsed slice: %d, expected: <%d, %d>\n", in thread_time_slice()
106 /* Keep the current thread busy for more than one slice, even though, in thread_time_slice()
116 * time slice is disabled and enabled
119 * priorities and few with same priorities and enable the time slice.
120 * Ensure that each thread is given the time slice period to execute.
138 /* The slice size needs to be set in ms (which get converted in ZTEST()
140 * slice in cycles. That requires a bit of care to be sure the in ZTEST()
171 /* enable time slice (and reset the counter!) */ in ZTEST()
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Dtest_sched_timeslice_and_lock.c238 * @brief Validate preemptive thread behavior with time slice
241 * time slice for threads with priority 0. Make sure the threads
242 * with equal priorities are executed in time slice.
258 /* checkpoint: equal priority threads get executed every time slice */ in ZTEST()
265 k_sched_time_slice_set(0, 0); /* disable time slice */ in ZTEST()
276 * setup time slice for threads with priority 0. Make sure the
277 * threads with equal priorities are executed in time slice.
296 /* checkpoint: equal priority threads get executed every time slice */ in ZTEST()
/Zephyr-latest/tests/kernel/tickless/tickless_concept/src/
Dmain.c23 /*slice size is set as half of the sleep duration*/
26 /*maximum slice duration accepted by the test*/
44 TC_PRINT("elapsed slice %" PRId64 ", expected: <%" PRId64 ", %" PRId64 ">\n", in thread_tslice()
52 /*keep the current thread busy for more than one slice*/ in thread_tslice()
91 * @brief Verify tickless functionality with time slice
94 * slice. Check if the threads execute more than a tick.
101 /*enable time slice*/ in ZTEST()
121 /*disable time slice*/ in ZTEST()
/Zephyr-latest/tests/drivers/clock_control/pwm_clock/boards/
Dxmc45_relax_kit.overlay25 slice-prescaler = <0 0 0 0>;
Dxmc47_relax_kit.overlay25 slice-prescaler = <0 0 0 0>;
/Zephyr-latest/kernel/
Dtimeslicing.c80 void k_sched_time_slice_set(int32_t slice, int prio) in k_sched_time_slice_set() argument
83 slice_ticks = k_ms_to_ticks_ceil32(slice); in k_sched_time_slice_set()
DKconfig640 int "Time slice size (in ms)"
647 A time slice size of zero means "no limit" (i.e. an infinitely large
648 time slice).
/Zephyr-latest/drivers/memc/
Dsifive_ddr.c129 for (uint32_t slice = 0; slice < 8; slice++) { in ddr_phy_fixup() local
/Zephyr-latest/doc/_extensions/zephyr/domain/static/js/
Dboard-catalog.js18 const hashParams = new URLSearchParams(window.location.hash.slice(1));
37 const hashParams = new URLSearchParams(window.location.hash.slice(1));
92 vendorOptions = Array.from(vendorSelect.options).slice(1);
/Zephyr-latest/tests/kernel/common/src/
Datomic.c291 /* This helper function will run more the one slice */
310 * threads are of equal priority, so enable time slice to make
313 * according to the time slice.
321 /* enable time slice 1ms at priority 10 */ in ZTEST()
334 /* disable time slice */ in ZTEST()
/Zephyr-latest/boards/infineon/xmc47_relax_kit/
Dxmc47_relax_kit.dts168 slice-prescaler = <15 15 15 15>;
169 slice-deadtime-prescaler = <3 3 3 3>;
/Zephyr-latest/doc/kernel/services/scheduling/
Dindex.rst173 are measured in system clock ticks. The time slice size is configurable,
176 At the end of every time slice, the scheduler checks to see if the current
193 for longer than a single time slice without being required to yield.
Dtimeslicing.svg2 …>Time Slice</div></div></foreignObject><text x="28" y="12" fill="#000000" text-anchor="middle" fon…
/Zephyr-latest/boards/infineon/xmc45_relax_kit/
Dxmc45_relax_kit.dts133 slice-prescaler = <15 15 15 15>;
/Zephyr-latest/drivers/clock_control/
Dclock_control_agilex5_ll.c190 /* Division setting for ping pong counter in clock slice */ in get_mpu_clk()
/Zephyr-latest/drivers/sensor/bosch/bmp581/
Dbmp581.h29 /* BIT SLICE GET AND SET FUNCTIONS */
/Zephyr-latest/scripts/ci/
Dpylintrc138 invalid-slice-index,
/Zephyr-latest/drivers/video/
Dvideo_mcux_smartdma.c122 /* The firmware writes the index of the frame slice in nxp_video_sdma_stream_start()

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