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/Zephyr-latest/samples/kernel/condition_variables/simple/
DREADME.rst141 [thread 0] done is now 1. Signalling cond.
144 [thread 1] done is now 2. Signalling cond.
147 [thread 2] done is now 3. Signalling cond.
150 [thread 3] done is now 4. Signalling cond.
153 [thread 4] done is now 5. Signalling cond.
156 [thread 5] done is now 6. Signalling cond.
159 [thread 6] done is now 7. Signalling cond.
162 [thread 7] done is now 8. Signalling cond.
165 [thread 8] done is now 9. Signalling cond.
168 [thread 9] done is now 10. Signalling cond.
[all …]
/Zephyr-latest/dts/bindings/mbox/
Dnxp,mbox-mailbox.yaml8 This driver uses 4 interrupts for mbox signalling mode per each channel,
/Zephyr-latest/include/zephyr/drivers/
Dmbox.h60 * This API supports two modes: signalling mode and data transfer mode.
62 * In signalling mode:
148 * The data parameter must be NULL in signalling mode.
248 * when the driver is used for signalling.
349 * This number can be 0 when the driver only supports signalling or when on the
360 * @retval 0 Indicates signalling
Dsdhc.h142 * UHS cards can run with 1.8V signalling for improved power consumption. Legacy
143 * cards may support 3.0V signalling, and all cards start at 3.3V.
217 enum sd_voltage signal_voltage; /*!< IO signalling voltage (usually 1.8 or 3.3V) */
/Zephyr-latest/samples/kernel/condition_variables/simple/src/
Dmain.c41 printk("[thread %d] done is now %d. Signalling cond.\n", myid, done); in worker_thread()
/Zephyr-latest/subsys/net/lib/ptp/
Dclock.h201 * @brief Function signalling timoeout of one of PTP Ports timer
208 * @brief Function signalling to the PTP Clock that STATE_DECISION_EVENT occurred and
/Zephyr-latest/soc/intel/intel_adsp/common/include/
Dintel_adsp_ipc.h60 * signalling IPC message completion and those actions should be done by
62 * writing to IPC registers signalling message completion normally by this API.
/Zephyr-latest/drivers/mbox/
Dmbox_andes_plic_sw.c74 /* MBOX PLIC only support signalling mode */ in mbox_plic_mtu_get()
Dmbox_nrfx_ipc.c101 /* We only support signalling */ in mbox_nrf_mtu_get()
Dmbox_nxp_imx_mu.c43 /* Signalling mode. */ in nxp_imx_mu_send()
Dmbox_nxp_mailbox.c121 /* Signalling mode. */ in nxp_mailbox_send()
Dmbox_stm32_hsem.c171 /* We only support signalling */ in mbox_stm32_hsem_mtu_get()
/Zephyr-latest/soc/microchip/mec/
DKconfig202 signalling.
/Zephyr-latest/subsys/bluetooth/host/classic/
Drfcomm_internal.h19 /* RFCOMM signalling connection specific context */
/Zephyr-latest/drivers/spi/
Dspi_xec_qmspi_ldma.c33 /* MEC172x QMSPI controller SPI Mode 3 signalling has an anomaly where
216 * SPI signalling mode: CPOL and CPHA
237 * There is an anomaly in MEC172x for SPI signalling mode 3. We must
967 /* default SPI Mode 0 signalling */ in qmspi_xec_init()
/Zephyr-latest/include/zephyr/xen/public/
Devent_channel.h106 * signalling and then) check for the existence of whatever condition
/Zephyr-latest/soc/microchip/mec/common/spigen/
Dmec_spi_gen.py285 help="SPI signalling mode 3-bit field: 0-7")
326 print(" SPI Signalling Mode = {0}".format(args.spi_mode))
/Zephyr-latest/doc/hardware/emulator/
Dbus_emulators.rst119 and potentially signalling an interrupt.
/Zephyr-latest/boards/ezurio/bl654_usb/doc/
Dbl654_usb.rst121 The blue LED should start a fade pattern, signalling the bootloader is
/Zephyr-latest/drivers/ethernet/
Deth_nxp_s32_netc.c42 /* Handler doesn't require any data to be passed, used only for signalling */ in nxp_s32_eth_msix_wrapper()
/Zephyr-latest/subsys/bluetooth/controller/hci/
Dhci_driver.c617 LOG_DBG("FC: signalling"); in process_hbuf()
660 LOG_DBG("FC: signalling"); in process_hbuf()
/Zephyr-latest/tests/kernel/poll/src/
Dtest_poll.c720 /* Enable polling thread by signalling */ in threadstate()
730 * is available during event signalling.
/Zephyr-latest/scripts/
Dsnippets.py90 '''Class for signalling expected errors'''
/Zephyr-latest/drivers/counter/
Dcounter_nxp_mrt.c9 * of signalling the shared interrupt with a different period. This driver treats all the channels
/Zephyr-latest/drivers/espi/
Despi_saf_mchp_xec.c195 * 1. Save QMSPI driver frequency divider, SPI signalling mode, and
203 * 8. If user configuration overrides frequency, signalling mode,

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