Searched full:rising (Results 1 – 25 of 102) sorted by relevance
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| /Zephyr-latest/dts/bindings/display/panel/ |
| D | panel-timing.yaml | 120 0 drives pixel data on falling edge, and samples on rising edge.
121 1 drives pixel data on rising edge, and samples data on falling edge
129 Drive sync on rising or sample sync on falling edge. If not specified
132 and sample sync on rising edge of pixel clock.
133 Use 1 to drive sync on rising edge
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| /Zephyr-latest/dts/bindings/gpio/ |
| D | zephyr,gpio-emul.yaml | 11 rising-edge:
12 description: Enables support for rising edge interrupt detection
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| /Zephyr-latest/dts/bindings/pinctrl/ |
| D | nuvoton,npcx-pinctrl.yaml | 98 - "high-rising": Select the detection polarity to high/rising
101 - "high-rising"
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| /Zephyr-latest/include/zephyr/drivers/interrupt_controller/ |
| D | gd32_exti.h | 22 /** Trigger on rising edge */
26 /** Trigger on rising and falling edge */
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| D | gpio_intc_stm32.h | 52 /* Trigger on rising edge */
56 /* Trigger on both rising and falling edge */
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| D | intc_xmc4xxx.h | 16 * @param trig Trigger edge type (falling, rising or both)
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| D | intc_eirq_nxp_s32.h | 22 /** Interrupt triggered on rising edge */
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| D | intc_wkpu_nxp_s32.h | 21 /** Interrupt triggered on rising edge */
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| /Zephyr-latest/dts/bindings/interrupt-controller/ |
| D | st,stm32g0-exti.yaml | 8 dedicated Rising and Falling interrupt pending registers.
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| D | st,stm32h7rs-exti.yaml | 8 with two dedicated Rising and Falling interrupt pending registers
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| /Zephyr-latest/dts/bindings/counter/ |
| D | nxp,lptmr.yaml | 37 will be used to determine the "rising-edge
59 2 ^ [prescaler-glitch-filter] rising edges detected
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| /Zephyr-latest/samples/subsys/tracing/ |
| D | gpio.overlay | 11 rising-edge;
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| /Zephyr-latest/include/zephyr/drivers/sensor/ |
| D | mcux_lpcmp.h | 34 /** LPCMP output rising event trigger. */
87 * 001b: COUT rising edge event close an active window
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| /Zephyr-latest/drivers/gpio/ |
| D | gpio_pca953x.c | 47 uint8_t rising; member
122 if (!irq_state->rising && !irq_state->falling) { in gpio_pca953x_handle_interrupt()
138 /* Mask gpio transactions with rising/falling edge interrupt config */ in gpio_pca953x_handle_interrupt()
139 interrupt_status = (irq_state->rising & transitioned_pins & in gpio_pca953x_handle_interrupt()
362 irq->rising &= ~BIT(pin); in gpio_pca953x_pin_interrupt_configure()
366 irq->rising |= BIT(pin); in gpio_pca953x_pin_interrupt_configure()
369 irq->rising &= ~BIT(pin); in gpio_pca953x_pin_interrupt_configure()
372 irq->rising |= BIT(pin); in gpio_pca953x_pin_interrupt_configure()
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| D | gpio_tca6424a.c | 30 uint32_t rising; member
193 if (!irq_state->rising && !irq_state->falling) { in tca6424a_handle_interrupt()
209 /* Mask gpio transactions with rising/falling edge interrupt config */ in tca6424a_handle_interrupt()
210 interrupt_status = (irq_state->rising & transitioned_pins & current_state); in tca6424a_handle_interrupt()
413 irq->rising &= ~BIT(pin); in tca6424a_pin_interrupt_configure()
417 irq->rising |= BIT(pin); in tca6424a_pin_interrupt_configure()
420 irq->rising &= ~BIT(pin); in tca6424a_pin_interrupt_configure()
423 irq->rising |= BIT(pin); in tca6424a_pin_interrupt_configure()
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| /Zephyr-latest/drivers/serial/ |
| D | Kconfig.altera | 23 Enabling this will cause the transmitter to wait for rising edge of CTS before sending.
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| /Zephyr-latest/include/zephyr/dt-bindings/interrupt-controller/ |
| D | it8xxx2-wuc.h | 19 /** WUC rising edge trigger mode */
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| /Zephyr-latest/dts/bindings/misc/ |
| D | renesas,ra-external-interrupt.yaml | 25 - "rising"
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| /Zephyr-latest/tests/drivers/gpio/gpio_enable_disable_interrupt/src/ |
| D | main.c | 91 "failed to set interrupt with edge rising"); in ZTEST_F()
100 "failed to set interrupt with edge rising"); in ZTEST_F()
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| /Zephyr-latest/dts/bindings/watchdog/ |
| D | ti,tps382x.yaml | 17 when WDI sees a rising edge or a falling edge. If unused, the WDI
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| /Zephyr-latest/dts/bindings/wifi/ |
| D | nordic,nrf70-qspi.yaml | 30 Number of clock cycles from the rising edge of the SPI clock
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| /Zephyr-latest/dts/bindings/stepper/adi/ |
| D | adi,tmc2209.yaml | 42 This means that the step signal can be toggled on both the rising and falling edge.
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| /Zephyr-latest/dts/bindings/video/ |
| D | video-interfaces.yaml | 108 - 1 # rising
111 Sample data on falling, rising or both edges of the pixel clock signal.
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| /Zephyr-latest/include/zephyr/drivers/dma/ |
| D | dma_mcux_lpc.h | 28 * high or rising edge triggered, based on TRIG_TYPE selection
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| /Zephyr-latest/drivers/adc/ |
| D | adc_ads7052.c | 195 * The most significant bit (MSB) of the output data is launched on the SDO pin on the rising edge
196 * after the first SCLK falling edge. Subsequent output bits are launched on the subsequent rising
198 * subsequent SCLK rising edges. The device enters the ACQ state after 18 clocks and a minimum time
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