Searched full:riscv64 (Results 1 – 25 of 25) sorted by relevance
6 The RISCV64 QEMU board configuration is used to emulate the RISCV64 architecture.13 with toolchain and QEMU support for the RISCV64 architecture is v0.10.2.43 threadA: Hello World from riscv64!44 threadB: Hello World from riscv64!45 threadA: Hello World from riscv64!46 threadB: Hello World from riscv64!47 threadA: Hello World from riscv64!48 threadB: Hello World from riscv64!49 threadA: Hello World from riscv64!50 threadB: Hello World from riscv64![all …]
5 set(QEMU_binary_suffix riscv64)6 set(QEMU_CPU_TYPE_${ARCH} riscv64)
3 full_name: QEMU Emulation for RISCV64
6 #include <qemu/virt-riscv64.dtsi>
10 arch.riscv64.riscv_gp.relative_addressing:13 arch.riscv64.riscv_gp.thread_pointer:
14 - arch:riscv64:CONFIG_ZTEST_STACK_SIZE=8192
11 arch.riscv64.fatal:
9 #include <sifive/riscv64-fu740.dtsi>
6 set(CROSS_COMPILE_TARGET_riscv riscv64-zephyr-elf)
46 riscv64-zephyr-elf-gdb build/zephyr/zephyr.elf
40 kernel.fpu_sharing.generic.riscv64:
41 bool "RISCV64 CPU ISA"
55 /* In riscv64, CSR pmacfg number are even number (0, 2, ...) */
38 set(triple riscv64-unknown-elf)
69 <path_to_zephyr_sdk>/riscv64-zephyr-elf/bin/riscv64-zephyr-elf-gdb
9 #include <sifive/riscv64-fu540.dtsi>
53 <softconsole_path>/riscv-unknown-elf-gcc/bin/riscv64-unknown-elf-gdb \
58 <softconsole_path>/riscv-unknown-elf-gcc/bin/riscv64-unknown-elf-gdb \
24 RISCV64 Unoptimized
119 * you should use :file:`riscv64-zephyr-elf-gdb`126 riscv64-zephyr-elf-gdb -ex 'target remote localhost:3333' -ex load build/zephyr/zephyr.elf
163 (for example, **riscv64-zephyr-elf-gdb-py**) and check that Python
268 riscv64-zephyr-elf-gdb build/zephyr/zephyr.elf311 ./riscv64-zephyr-elf-gdb build/zephyr/zephyr.elf
522 * So don't use this on RISCV64. in sys_bitarray_alloc()