/Zephyr-latest/scripts/ |
D | requirements.txt | 1 -r requirements-base.txt 2 -r requirements-build-test.txt 3 -r requirements-run-test.txt 4 -r requirements-extras.txt 5 -r requirements-compliance.txt
|
/Zephyr-latest/doc/safety/ |
D | safety_overview.rst | 9 This document is the safety documentation providing an overview over the safety-relevant activities 26 This document is a living document and may evolve over time as new requirements, guidelines, or 43 code base is pre-existing, we use the route 3s/1s approach defined by the IEC 61508 standard. 46 *Assessment of non-compliant development. Which is basically the route 1s with existing 50 *Compliant development. Compliance with the requirements of this standard for the avoidance and 57 electrical, electronic, and programmable electronic safety-related systems. Here's an overview of 69 includes the identification of safety requirements, the development of a safety plan, and the 74 safety-related system to ensure that it meets the specified SIL and other safety requirements. 79 documentation process to ensure that all aspects of the safety-related system are fully 80 documented and that there is full traceability from the safety requirements to the final system [all …]
|
/Zephyr-latest/arch/arm/core/ |
D | vector_table.ld | 2 * Copyright (c) 2019 - 2020 Nordic Semiconductor ASA 4 * SPDX-License-Identifier: Apache-2.0 11 * exc_vector_table must respect the alignment requirements of VTOR.TBLOFF 16 /* VTOR bits 0:7 are reserved (RES0). This requires that the base address 17 * of the vector table is 64-word aligned. 21 /* VTOR bits 0:6 are reserved (RES0). This requires that the base address 22 * of the vector table is 32-word aligned. 34 * setting in any Cortex-M implementation (might not be required in every 35 * Cortex-M processor). 44 * should be aligned in such a way so that it satisfies the requirements of
|
/Zephyr-latest/dts/bindings/interrupt-controller/ |
D | nxp,s32-wkpu.yaml | 1 # Copyright 2023-2024 NXP 2 # SPDX-License-Identifier: Apache-2.0 4 description: NXP S32 Wake-up Unit 6 compatible: "nxp,s32-wkpu" 8 include: base.yaml 14 child-binding: 16 NXP S32 WKPU external interrupt configuration. Specific requirements for each 21 filter-enable; 25 filter-enable:
|
D | nxp,s32-siul2-eirq.yaml | 1 # Copyright 2022-2024 NXP 3 # SPDX-License-Identifier: Apache-2.0 7 compatible: "nxp,s32-siul2-eirq" 9 include: [interrupt-controller.yaml, pinctrl-device.yaml, base.yaml] 15 pinctrl-0: 18 pinctrl-names: 21 filter-prescaler: 33 child-binding: 35 NXP S32 SIUL2 External Interrupt configuration. Specific filter requirements 37 controller, labeled `irq_<interrupt-number>`. For example: [all …]
|
/Zephyr-latest/.github/workflows/ |
D | twister_tests.yml | 2 # SPDX-License-Identifier: Apache-2.0 9 - main 10 - v*-branch 11 - collab-* 13 - 'scripts/pylib/**' 14 - 'scripts/twister' 15 - 'scripts/tests/twister/**' 16 - '.github/workflows/twister_tests.yml' 17 - 'scripts/schemas/twister/' 20 - main [all …]
|
D | pylib_tests.yml | 2 # SPDX-License-Identifier: Apache-2.0 9 - main 10 - v*-branch 12 - 'scripts/pylib/build_helpers/**' 13 - '.github/workflows/pylib_tests.yml' 16 - main 17 - v*-branch 19 - 'scripts/pylib/build_helpers/**' 20 - '.github/workflows/pylib_tests.yml' 23 pylib-tests: [all …]
|
D | twister_tests_blackbox.yml | 2 # SPDX-License-Identifier: Apache-2.0 9 - main 10 - collab-* 11 - v*-branch 13 - 'scripts/pylib/twister/**' 14 - 'scripts/twister' 15 - 'scripts/tests/twister_blackbox/**' 16 - '.github/workflows/twister_tests_blackbox.yml' 19 twister-tests: 21 runs-on: ${{ matrix.os }} [all …]
|
D | scripts_tests.yml | 2 # SPDX-License-Identifier: Apache-2.0 9 - main 10 - v*-branch 12 - 'scripts/build/**' 13 - '.github/workflows/scripts_tests.yml' 16 - main 17 - v*-branch 19 - 'scripts/build/**' 20 - '.github/workflows/scripts_tests.yml' 23 scripts-tests: [all …]
|
/Zephyr-latest/samples/net/zperf/ |
D | README.rst | 1 .. zephyr:code-sample:: zperf 3 :relevant-api: net_config 16 - Compatible with iPerf_2.0.5. Note that in newer iPerf versions, 20 .. code-block:: console 24 - Client or server mode allowed without need to modify the source code. 29 zperf is board-agnostic. However, to run the zperf sample application, 34 - Freedom Board (FRDM K64F) 35 - QEMU x86 36 - Arm FVP BaseR AEMv8-R 37 - ARM BASE RevC AEMv8A Fixed Virtual Platforms [all …]
|
/Zephyr-latest/samples/sensor/grove_light/ |
D | README.rst | 1 .. zephyr:code-sample:: grove_light 3 :relevant-api: sensor_interface 13 Requirements chapter 20 * `Grove Base Shield`_ 34 .. zephyr-app-commands:: 35 :zephyr-app: samples/sensor/grove_light 43 .. code-block:: console 45 *** Booting Zephyr OS build v3.6.0-rc1-32-gba639ed6a893 *** 50 .. _Grove Base Shield: https://wiki.seeedstudio.com/Base_Shield_V2/ 51 .. _Grove Light Sensor: https://wiki.seeedstudio.com/Grove-Light_Sensor/
|
/Zephyr-latest/samples/drivers/misc/grove_display/ |
D | README.rst | 1 .. zephyr:code-sample:: grove-lcd 3 :relevant-api: grove_display 13 Requirements chapter 20 * `Grove Base Shield`_ [Optional] 28 On some boards you will need to use 2 pull-up resistors (10k Ohm) between the 44 .. zephyr-app-commands:: 45 :zephyr-app: samples/drivers/misc/grove_display 50 .. _Grove Base Shield: https://wiki.seeedstudio.com/Base_Shield_V2/ 51 .. _Grove LCD module: http://wiki.seeed.cc/Grove-LCD_RGB_Backlight/
|
/Zephyr-latest/samples/sensor/grove_temperature/ |
D | README.rst | 1 .. zephyr:code-sample:: grove_temperature 3 :relevant-api: sensor_interface 15 Requirements chapter 22 * `Grove Base Shield`_ 39 .. zephyr-app-commands:: 40 :zephyr-app: samples/sensor/grove_temperature 48 .. code-block:: console 50 *** Booting Zephyr OS build v3.6.0-rc1-32-gba639ed6a893 *** 55 .. _Grove Base Shield: https://wiki.seeedstudio.com/Base_Shield_V2/ 56 .. _Grove Temperature Sensor: https://wiki.seeedstudio.com/Grove-Temperature_Sensor_V1.2/ [all …]
|
/Zephyr-latest/arch/arm/core/cortex_m/ |
D | relay_vector_table.ld | 2 * Copyright (c) 2019 - 2020 Nordic Semiconductor ASA 4 * SPDX-License-Identifier: Apache-2.0 11 * Therefore, vector_relay_table must respect the alignment requirements 15 /* VTOR bits 0:6 are reserved (RES0). This requires that the base address 16 * of the vector table is 32-word aligned. 25 * setting in any Cortex-M implementation (might not be required in every 26 * Cortex-M processor).
|
/Zephyr-latest/dts/bindings/clock/ |
D | nuvoton,npcx-pcc.yaml | 2 # SPDX-License-Identifier: Apache-2.0 8 High-Frequency Clock Generator (HFCG), is the source clock of Cortex-M4 core 14 clock-frequency = <DT_FREQ_M(100)>; /* OFMCLK runs at 100MHz */ 15 core-prescaler = <5>; /* CORE_CLK runs at 20MHz */ 16 apb1-prescaler = <5>; /* APB1_CLK runs at 20MHz */ 17 apb2-prescaler = <5>; /* APB2_CLK runs at 20MHz */ 18 apb3-prescaler = <5>; /* APB3_CLK runs at 20MHz */ 21 compatible: "nuvoton,npcx-pcc" 23 include: [clock-controller.yaml, base.yaml] 29 clock-frequency: [all …]
|
D | nuvoton,npcm-pcc.yaml | 2 # SPDX-License-Identifier: Apache-2.0 8 High-Frequency Clock Generator (HFCG), is the source clock of Cortex-M4 core 14 clock-frequency = <DT_FREQ_M(96)>; /* OFMCLK runs at 96MHz */ 15 core-prescaler = <1>; /* CORE_CLK runs at 96MHz */ 16 apb1-prescaler = <8>; /* APB1_CLK runs at 12MHz */ 17 apb2-prescaler = <1>; /* APB2_CLK runs at 96MHz */ 18 apb3-prescaler = <1>; /* APB3_CLK runs at 96MHz */ 19 apb6-prescaler = <1>; /* APB6_CLK runs at 96MHz */ 20 fiu-prescaler = <1>; /* FIU_CLK runs at 96MHz */ 21 i3c-prescaler = <1>; /* I3C_CLK runs at 96MHz */ [all …]
|
/Zephyr-latest/samples/boards/nordic/nrfx_prs/ |
D | README.rst | 1 .. zephyr:code-sample:: nrf_nrfx_prs 4 Use nRF peripherals that share the same ID and base address. 10 and base address. Such peripherals cannot be used simultaneously because they 21 - by pressing Button 1 user can request a transfer to be performed using the 23 - by pressing Button 2 user can switch between the two peripherals 37 Requirements chapter 50 .. zephyr-app-commands:: 51 :zephyr-app: samples/boards/nordic/nrfx_prs
|
/Zephyr-latest/samples/boards/nordic/clock_skew/ |
D | README.rst | 1 .. zephyr:code-sample:: nrf_clock_skew 4 Measure the skew between the high-frequency and low-frequency clocks. 17 accurate high-frequency clock generally enable this source 21 Requirements chapter 29 .. zephyr-app-commands:: 30 :zephyr-app: samples/boards/nordic/clock_skew 41 .. code-block:: console 43 *** Booting Zephyr OS build v2.5.0-rc3-94-g06a4b650467b *** 44 Power-up clocks: LFCLK[ON]: Running LFXO ; HFCLK[OFF]: Running HFINT 46 Timer-running clocks: LFCLK[ON]: Running LFXO ; HFCLK[OFF]: Running HFINT [all …]
|
/Zephyr-latest/samples/boards/quicklogic/qomu/ |
D | README.rst | 6 This sample demonstrates how to load bitstream on EOS-S3 FPGA and use the 9 Requirements section in Zephyr usbserial driver on Qomu 12 * `QuickLogic Qomu board <https://www.quicklogic.com/products/eos-s3/quickfeather-development-kit/>… 17 .. zephyr-app-commands:: 18 :zephyr-app: samples/boards/quicklogic/qomu 19 :host-os: unix 27 …mple into Qomu you can use `TinyFPGA-Programmer-Application <https://github.com/QuickLogic-Corp/Ti… 29 .. code-block:: console 31 …python3 /PATH/TO/BASE/DIR/TinyFPGA-Programmer-Application/tinyfpga-programmer-gui.py --mode m4 --m… 33 See `Qomu User Guide <https://github.com/QuickLogic-Corp/qomu-dev-board/blob/662f8841bdc1ed35c1539a… [all …]
|
/Zephyr-latest/arch/arm/core/cortex_m/tz/ |
D | Kconfig | 1 # ARM TrustZone-M core configuration options 4 # SPDX-License-Identifier: Apache-2.0 7 bool "ARM TrustZone-M support" 11 Platform has support for ARM TrustZone-M. 15 menu "ARM TrustZone-M Options" 21 comment "Non-secure firmware" 28 Force NMI, HardFault, and BusFault (in Mainline ARMv8-M) 37 Non-Secure state. Secure Entry functions must be 38 located in Non-Secure Callable memory regions. 41 hex "ARM Non-Secure Callable Region base address" [all …]
|
/Zephyr-latest/dts/bindings/gpio/ |
D | nxp,s32-gpio.yaml | 1 # Copyright 2022-2023 NXP 2 # SPDX-License-Identifier: Apache-2.0 17 #include <zephyr/dt-bindings/gpio/nxp-s32-gpio.h> 25 priorities according to application-specific requirements. This is owing to 29 designated for the data-ready interrupt originating from a sensor. This 35 despite being named WKPU, the flag is not meant to configure GPIOs as wake-up 38 compatible: "nxp,s32-gpio" 40 include: [gpio-controller.yaml, base.yaml] 46 reg-names: 53 respective external interrupt lines (<gpio-pin eirq-line>). [all …]
|
/Zephyr-latest/subsys/mgmt/mcumgr/smp/ |
D | Kconfig | 2 # Copyright Nordic Semiconductor ASA 2020-2022. All rights reserved. 3 # SPDX-License-Identifier: Apache-2.0 11 # MCUMGR_SMP_ -- for general SMP options; 12 # MCUMGR_SMP_CBOR -- for CBOR encoding specific options; 23 data directly to main map, creating sub-maps instead so 36 base map, which is already taken into account, should 76 have no requirements. 92 base map, which is already taken into account, should
|
/Zephyr-latest/dts/bindings/mtd/ |
D | nordic,qspi-nor.yaml | 2 # SPDX-License-Identifier: Apache-2.0 7 compatible: "nordic,qspi-nor" 9 include: [base.yaml, "jedec,spi-nor-common.yaml"] 11 on-bus: qspi 17 jedec-id: 23 The size in bits. Set this or size-in-bytes, but not both. 25 size-in-bytes: 31 quad-enable-requirements: 37 - "fastread" # Single data line SPI, FAST_READ (0x0B) 38 - "read2o" # Dual data line SPI, READ2O (0x3B) [all …]
|
/Zephyr-latest/doc/project/ |
D | release_process.rst | 6 The Zephyr project releases on a time-based cycle, rather than a feature-driven 10 A time-based release process enables the Zephyr project to provide users with a 12 roughly 4-month release cycle allows the project to coordinate development of 19 - Release tagging procedure: 21 - linear mode on main branch, 22 - release branches for maintenance after release tagging. 23 - Each release period will consist of a development phase followed by a 29 - Development phase: all changes are considered and merged, subject to 31 - Stabilisation phase: the release manager creates a vN-rc1 tag and the tree 33 - CI sees the tag, builds and runs tests; Test teams analyse the report from the [all …]
|
/Zephyr-latest/samples/bluetooth/bap_broadcast_source/ |
D | README.rst | 1 .. zephyr:code-sample:: bluetooth_bap_broadcast_source 3 :relevant-api: bluetooth bt_audio bt_bap 12 Broadcast Audio Source Endpoint (BASE) and finally the BIGinfo together with 20 Check the :zephyr:code-sample-category:`bluetooth` samples for general information. 22 Requirements chapter 32 use ``-DEXTRA_CONF_FILE=overlay-bt_ll_sw_split.conf`` to enable the required ISO 36 ------------------------- 41 .. zephyr-app-commands:: 42 :zephyr-app: samples/bluetooth/bap_broadcast_source/ 45 :west-args: --sysbuild [all …]
|