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/Zephyr-latest/drivers/pcie/host/
Dpcie_ecam.c21 * PCIe Controllers Regions
24 * - handle prefetchable regions
42 } regions[PCIE_REGION_MAX]; member
89 data->regions[PCIE_REGION_IO].bus_start = cfg->ranges[i].pcie_bus_addr; in pcie_ecam_init()
90 data->regions[PCIE_REGION_IO].phys_start = cfg->ranges[i].host_map_addr; in pcie_ecam_init()
91 data->regions[PCIE_REGION_IO].size = cfg->ranges[i].map_length; in pcie_ecam_init()
93 if (data->regions[PCIE_REGION_IO].bus_start < 0x1000) { in pcie_ecam_init()
94 data->regions[PCIE_REGION_IO].allocation_offset = 0x1000; in pcie_ecam_init()
98 data->regions[PCIE_REGION_MEM].bus_start = cfg->ranges[i].pcie_bus_addr; in pcie_ecam_init()
99 data->regions[PCIE_REGION_MEM].phys_start = cfg->ranges[i].host_map_addr; in pcie_ecam_init()
[all …]
/Zephyr-latest/arch/arm/core/mpu/
Darm_core_mpu_dev.h26 * regions.
28 * @param mpu_regions_num the number of available HW MPU regions.
34 * on top of the statically configured memory regions, the maximum number of
36 * regions. This ensures that in the worst-case where there are gaps between
38 * programmed using the available number of HW MPU regions.
45 * on top of the statically configured memory regions, the maximum number
46 * of memory domain partitions is equal to the number of available MPU regions.
53 * @brief Maximum number of MPU regions required to configure a
58 /* When dynamic regions may not be defined on top of statically
59 * allocated memory regions, defining a region for a thread stack
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Darm_mpu_v8_internal.h30 * regions may be configured.
141 * different types of memory regions. in mpu_init()
237 /* MPU regions are contiguous so return the region number, in get_region_index()
328 * marked area for dynamic memory regions.
418 /* Iterate all mpu regions in reversed order */ in mpu_buffer_validate()
447 * SAU, or IDAU regions."
449 * MPU regions are configurable, however, some platforms might have fixed-size
450 * SAU or IDAU regions. So, even if a buffer is allocated inside a single MPU
451 * region, it might span across multiple SAU/IDAU regions, which will make the
508 regions[], uint8_t regions_num, uint8_t start_reg_index,
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Dnxp_mpu.c33 * regions.
47 * Get the number of supported MPU regions.
155 /* This internal function programs the MPU regions defined in the DT when using
247 * The NXP MPU manages the permissions of the overlapping regions in mpu_sram_partitioning()
251 * guard region does not overlap with the (background) SRAM regions in mpu_sram_partitioning()
253 * In other words, the SRAM is split in two different regions. in mpu_sram_partitioning()
298 /* This internal function programs a set of given MPU regions
300 * sanity check of the memory regions to be programmed.
302 static int mpu_configure_regions(const struct z_arm_mpu_partition regions[], in mpu_configure_regions() argument
310 if (regions[i].size == 0U) { in mpu_configure_regions()
[all …]
Darm_mpu.c50 * regions.
96 /* This internal function programs the MPU regions defined in the DT when using
186 /* This internal function programs a set of given MPU regions
188 * sanity check of the memory regions to be programmed.
191 regions[], uint8_t regions_num, uint8_t start_reg_index, in mpu_configure_regions()
198 if (regions[i].size == 0U) { in mpu_configure_regions()
204 (!mpu_partition_is_valid(&regions[i]))) { in mpu_configure_regions()
209 reg_index = mpu_configure_region(reg_index, &regions[i]); in mpu_configure_regions()
358 * @brief configure fixed (static) MPU regions.
367 __ASSERT(0, "Configuring %u static MPU regions failed\n", in arm_core_mpu_configure_static_mpu_regions()
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Darm_mpu_v7_internal.h138 * in MPU regions indices right after the static regions.
179 /* Iterate all mpu regions in reversed order */ in mpu_buffer_validate()
187 * Since we iterate all mpu regions in reversed order, so in mpu_buffer_validate()
209 regions[], uint8_t regions_num, uint8_t start_reg_index,
212 /* This internal function programs the static MPU regions.
217 * If the static MPU regions configuration has not been successfully
227 /* In ARMv7-M architecture the static regions are in mpu_configure_static_mpu_regions()
241 /* This internal function programs the dynamic MPU regions.
246 * If the dynamic MPU regions configuration has not been successfully
254 /* In ARMv7-M architecture the dynamic regions are in mpu_configure_dynamic_mpu_regions()
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DKconfig26 The NXP MPU as well as the ARMv8-M MPU do not require MPU regions
29 The ARMv8-M MPU requires the active MPU regions be non-overlapping.
31 memory map when programming dynamic memory regions (e.g. PRIV stack
57 symbol to guarantee minimum size and alignment of MPU regions.
91 SoC definition should likely provide its own custom MPU regions.
100 and sub-regions(ARMv7-M) to cover this feature.
/Zephyr-latest/tests/drivers/mm/sys_mm_drv_api/src/
Dmain.c11 const struct sys_mm_drv_region *regions, *region; in ZTEST() local
13 regions = sys_mm_drv_query_memory_regions(); in ZTEST()
14 zassert_not_null(regions, NULL); in ZTEST()
16 SYS_MM_DRV_MEMORY_REGION_FOREACH(regions, region) in ZTEST()
21 sys_mm_drv_query_memory_regions_free(regions); in ZTEST()
/Zephyr-latest/dts/bindings/coredump/
Dzephyr,coredump.yaml11 memory-regions:
13 description: Start address and size of memory regions to be collected in a core dump
20 A device of type COREDUMP_TYPE_MEMCPY can directly memcpy the provided memory-regions
21 into the coredump. The memory-regions array can contain 0 or more entries, and more
22 regions can be added at runtime through the coredump_device_register_memory API.
24 memory-regions array with a size of 0 and a desired size. The coredump device will
/Zephyr-latest/subsys/mem_mgmt/
DKconfig8 Enable a small library to manage the memory regions defined in the DT
10 time an array of the memory regions defined in the DT that can be
19 allocate memory from DeviceTree defined memory regions.
/Zephyr-latest/soc/intel/intel_adsp/ace/include/
Dadsp_memory_regions.h9 /* Define amount of regions other than core heaps that virtual memory will be split to
10 * currently includes shared heap and oma region and one regions set to 0 as for table
22 /* Attribiutes for memory regions */
/Zephyr-latest/tests/drivers/coredump/coredump_api/boards/
Dqemu_riscv32.overlay13 memory-regions = <0x85000000 0x4>,
22 memory-regions = <0x86000000 0xC>;
29 memory-regions = <0x0 0x4>;
/Zephyr-latest/doc/services/mem_mgmt/
Dindex.rst6 It is possible in the devicetree to mark the memory regions with attributes by
36 regions out of devicetree defined memory regions, for example:
52 The conventional and recommended way to deal and manage with memory regions
55 list of memory regions and their attributes are compiled in a user-accessible
57 and act on regions and attributes (see next section for more details).
113 For example we can define several memory regions with different attributes and
115 allocate memory from those regions:
144 The user can then dynamically carve memory out of those regions using the
163 When several regions are marked with the same attributes, the memory is allocated:
165 1. From the regions where the ``zephyr,memory-attr`` property has the requested
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/Zephyr-latest/arch/arc/core/mpu/
Darc_mpu_common_internal.h36 * For ARC MPU, MPU regions can be overlapped, smaller in _mpu_configure()
67 * @brief configure the thread's MPU regions
127 * @brief configure MPU regions for the memory partitions of the memory domain
147 LOG_DBG("disable domain partition regions"); in arc_core_mpu_configure_mem_domain()
167 * @brief remove MPU regions for the memory partitions of the memory domain
200 * @brief get the maximum number of free regions for memory domain partitions
247 __ASSERT(0, "Request to configure: %u regions (supported: %u)\n", in arc_mpu_init()
255 * the MPU regions are filled in the reverse order. in arc_mpu_init()
258 * regions in mpu_config will be in the bottom. Then in arc_mpu_init()
259 * the special type regions will be above. in arc_mpu_init()
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/Zephyr-latest/tests/boards/nrf/dmm/src/
Dmain.c44 struct dmm_test_region regions[DMM_TEST_REGION_COUNT]; member
65 memcpy(fixture.regions, dmm_test_regions, sizeof(dmm_test_regions)); in test_setup()
157 dmm_check_input_buffer(&fixture->regions[DMM_TEST_REGION_CACHE], &fixture->fill_value, in ZTEST_USER_F()
165 dmm_check_input_buffer(&fixture->regions[DMM_TEST_REGION_CACHE], &fixture->fill_value, in ZTEST_USER_F()
173 dmm_check_output_buffer(&fixture->regions[DMM_TEST_REGION_CACHE], &fixture->fill_value, in ZTEST_USER_F()
181 dmm_check_output_buffer(&fixture->regions[DMM_TEST_REGION_CACHE], &fixture->fill_value, in ZTEST_USER_F()
189 dmm_check_input_buffer(&fixture->regions[DMM_TEST_REGION_NOCACHE], &fixture->fill_value, in ZTEST_USER_F()
197 dmm_check_input_buffer(&fixture->regions[DMM_TEST_REGION_NOCACHE], &fixture->fill_value, in ZTEST_USER_F()
205 dmm_check_output_buffer(&fixture->regions[DMM_TEST_REGION_NOCACHE], &fixture->fill_value, in ZTEST_USER_F()
213 dmm_check_output_buffer(&fixture->regions[DMM_TEST_REGION_NOCACHE], &fixture->fill_value, in ZTEST_USER_F()
/Zephyr-latest/dts/bindings/flash_controller/
Datmel,sam0-nvmctrl.yaml8 lock-regions:
11 description: Number of lock regions
/Zephyr-latest/drivers/mm/
Dmm_drv_ti_rat.c30 * @brief Set registers for the address regions being used
33 * @param region_num Number of regions being initialised
69 "Exceeding maximum number of regions"); in address_trans_init()
76 /* enable regions setup by user */ in address_trans_init()
84 * @param region_config Pointer to config struct for the regions
86 * @param translate_regions Number of regions being initialised
109 "Exceeding maximum number of regions"); in sys_mm_drv_page_phys_get()
/Zephyr-latest/tests/drivers/uart/uart_errors/boards/
Dnrf54h20dk_nrf54h20_cpuapp.overlay6 memory-regions = <&cpuapp_dma_region>;
10 memory-regions = <&cpuapp_dma_region>;
/Zephyr-latest/doc/kernel/usermode/
Dmpu_stack_objects.rst16 requirements for MPU regions. This is discussed in the memory placement
24 The MPU provides a fixed number of regions. Each region contains information
44 or even interactions between overlapping regions.
53 Some ARM MPUs use start and end addresses to define MPU regions and both the
59 logically OR regions to determine enforcement policy.
/Zephyr-latest/include/zephyr/arch/arm/mpu/
Darm_mpu.h43 /* Number of regions */
45 /* Regions */
70 * regions enabled during kernel initialization. Dynamic MPU regions (e.g.
/Zephyr-latest/tests/drivers/spi/spi_controller_peripheral/boards/
Dnrf54h20dk_nrf54h20_cpuapp.overlay9 memory-regions = <&cpuapp_dma_region>;
13 memory-regions = <&cpuapp_dma_region>;
Dnrf54h20dk_nrf54h20_cpurad.overlay9 memory-regions = <&cpurad_dma_region>;
13 memory-regions = <&cpurad_dma_region>;
/Zephyr-latest/tests/drivers/spi/spi_error_cases/boards/
Dnrf54h20dk_nrf54h20_cpuapp.overlay10 memory-regions = <&cpuapp_dma_region>;
14 memory-regions = <&cpuapp_dma_region>;
Dnrf54h20dk_nrf54h20_cpurad.overlay10 memory-regions = <&cpurad_dma_region>;
14 memory-regions = <&cpurad_dma_region>;
/Zephyr-latest/tests/drivers/uart/uart_async_api/boards/
Dnrf54h20dk_nrf54h20_cpuapp.overlay6 memory-regions = <&cpuapp_dma_region>;
11 memory-regions = <&dma_fast_region>;

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