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/Zephyr-latest/dts/bindings/input/
Dxptek,xpt2046.yaml2 # SPDX-License-Identifier: Apache-2.0
7 include: spi-device.yaml
10 int-gpios:
11 type: phandle-array
15 touchscreen-size-x:
20 touchscreen-size-y:
25 min-x:
28 description: minimum raw X value reported.
30 min-y:
33 description: minimum raw Y value reported.
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Dst,stmpe811.yaml2 # SPDX-License-Identifier: Apache-2.0
8 include: [i2c-device.yaml, touchscreen-common.yaml]
11 int-gpios:
12 type: phandle-array
17 raw-x-min:
20 Signed raw X axis start for scaling the reported coordinates.
23 raw-y-min:
26 Signed raw Y axis start for scaling the reported coordinates.
29 raw-x-max:
32 Raw X axis end for scaling the reported coordinates.
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Danalog-axis.yaml2 # SPDX-License-Identifier: Apache-2.0
12 #include <zephyr/dt-bindings/input/input-event-codes.h>
15 compatible = "analog-axis";
16 poll-period-ms = <15>;
17 axis-x {
18 io-channels = <&adc 0>;
19 in-deadzone = <50>;
20 in-min = <100>;
21 in-max = <800>;
26 compatible: "analog-axis"
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/Zephyr-latest/boards/st/st25dv_mb1283_disco/
Dst25dv_mb1283_disco.dts4 * SPDX-License-Identifier: Apache-2.0
7 /dts-v1/;
9 #include "st/f4/stm32f405vgtx-pinctrl.dtsi"
10 #include <zephyr/dt-bindings/input/input-event-codes.h>
11 #include <zephyr/dt-bindings/display/ili9xxx.h>
19 zephyr,shell-uart = &usart6;
26 compatible = "gpio-leds";
36 compatible = "gpio-keys";
69 compatible = "zephyr,mipi-dbi-spi";
70 reset-gpios = <&gpioc 1 GPIO_ACTIVE_HIGH>;
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/Zephyr-latest/boards/st/stm32f429i_disc1/
Dstm32f429i_disc1.dts5 * SPDX-License-Identifier: Apache-2.0
8 /dts-v1/;
10 #include <st/f4/stm32f429zitx-pinctrl.dtsi>
11 #include <zephyr/dt-bindings/display/ili9xxx.h>
12 #include <zephyr/dt-bindings/input/input-event-codes.h>
20 zephyr,shell-uart = &usart1;
29 compatible = "zephyr,memory-region", "mmio-sram";
32 zephyr,memory-region = "SDRAM2";
36 compatible = "gpio-leds";
48 compatible = "gpio-keys";
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/Zephyr-latest/samples/drivers/jesd216/src/
Dmain.c4 * SPDX-License-Identifier: Apache-2.0
40 [JESD216_MODE_111] = "1-1-1",
41 [JESD216_MODE_112] = "1-1-2",
42 [JESD216_MODE_114] = "1-1-4",
43 [JESD216_MODE_118] = "1-1-8",
44 [JESD216_MODE_122] = "1-2-2",
45 [JESD216_MODE_144] = "1-4-4",
46 [JESD216_MODE_188] = "1-8-8",
47 [JESD216_MODE_222] = "2-2-2",
48 [JESD216_MODE_444] = "4-4-4",
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/Zephyr-latest/drivers/input/
Dinput_stmpe811.c3 * SPDX-License-Identifier: Apache-2.0
84 * - bits [1-3] X, Y only acquisition mode
89 * Analog-to-digital Converter
91 * - bit [3] selects 12 bit ADC
92 * - bits [4-6] select ADC conversion time = 80
99 * - 00 : 1.625 MHz
100 * - 01 : 3.25 MHz
101 * - 10 : 6.5 MHz
102 * - 11 : 6.5 MHz
109 * - Fractional part : 7
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/Zephyr-latest/subsys/logging/frontends/
Dlog_frontend_stmesp.c4 * SPDX-License-Identifier: Apache-2.0
67 /* Dictionary-based log message */
84 /* Data length, non-zero fox hexdump message. */
96 uint32_t raw; member
116 early_buf_idx += (sizeof(uint32_t) - rem); in early_buf_align_idx()
138 return (EARLY_BUF_SIZE - early_buf_idx) >= len; in early_buf_has_space()
151 return (uint32_t)((uintptr_t)&early_buf[early_buf_idx] - (uintptr_t)len_loc - LEN_SZ); in early_buf_get_len()
229 unaligned = 4 - unaligned; in write_data()
230 unaligned = MIN(len, unaligned); in write_data()
232 len -= unaligned; in write_data()
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/Zephyr-latest/drivers/timer/
Dite_it8xxx2_timer.c3 * SPDX-License-Identifier: Apache-2.0
10 #include <zephyr/dt-bindings/interrupt-controller/ite-intc.h>
19 #define COUNT_1US (EC_FREQ / USEC_PER_SEC - 1)
40 /* Busy wait high timer max count is 71.58min (base on clock source 1MHz) */
135 timer2_reg->ET2PSR = EXT_PSR_32P768K; in timer_5ms_one_shot()
142 timer2_reg->ET2CNTLH2R = (uint8_t)((hw_cnt >> 16) & 0xff); in timer_5ms_one_shot()
143 timer2_reg->ET2CNTLHR = (uint8_t)((hw_cnt >> 8) & 0xff); in timer_5ms_one_shot()
144 timer2_reg->ET2CNTLLR = (uint8_t)(hw_cnt & 0xff); in timer_5ms_one_shot()
160 usec_to_wait--; in arch_busy_wait()
163 if ((IT8XXX2_EXT_CNTOX(BUSY_WAIT_H_TIMER) - start) >= usec_to_wait) { in arch_busy_wait()
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/Zephyr-latest/samples/boards/nordic/clock_skew/src/
Dmain.c4 * SPDX-License-Identifier: Apache-2.0
45 uint32_t min; in us_to_text_r() local
53 min = rem % 60; in us_to_text_r()
60 bp += snprintf(bp, bpe - bp, "%u d ", d); in us_to_text_r()
62 bp += snprintf(bp, bpe - bp, "%02u:%02u:%02u.%06u", in us_to_text_r()
63 hr, min, s, us); in us_to_text_r()
96 unsigned int raw; in show_clocks() member
126 counter_ref += ctr - (uint32_t)counter_ref; in sync_work_handler()
134 printf(" %s", us_to_text(ref_to_us(base->ref))); in sync_work_handler()
135 ref_span_us = ref_to_us(latest->ref - base->ref); in sync_work_handler()
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/Zephyr-latest/samples/boards/phytec/reel_board/mesh_badge/src/
Dmesh.c4 * SPDX-License-Identifier: Apache-2.0
86 snprintk(buf, sizeof(buf), "Mesh Started\nAddr: 0x%04x", addr); in show_mesh_status()
187 struct led_onoff_state *state = model->rt->user_data; in gen_onoff_get()
189 printk("addr 0x%04x onoff 0x%02x\n", in gen_onoff_get()
190 bt_mesh_model_elem(model)->rt->addr, state->current); in gen_onoff_get()
192 net_buf_simple_add_u8(&msg, state->current); in gen_onoff_get()
205 struct net_buf_simple *msg = model->pub->msg; in gen_onoff_set_unack()
206 struct led_onoff_state *state = model->rt->user_data; in gen_onoff_set_unack()
221 if (state->last_tid == tid && state->last_tx_addr == ctx->addr && in gen_onoff_set_unack()
222 (now - state->last_msg_timestamp <= (6 * MSEC_PER_SEC))) { in gen_onoff_set_unack()
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/Zephyr-latest/drivers/clock_control/
Dclock_control_litex.c4 * SPDX-License-Identifier: Apache-2.0
66 …* https://github.com/Digilent/Zybo-hdmi-out/blob/b991fff6e964420ae3c00c3dbee52f2ad748b3ba/sdk/disp…
213 return litex_clk_filter_table[glob_mul - 1]; in litex_clk_lookup_filter()
219 return litex_clk_lock_table[glob_mul - 1]; in litex_clk_lookup_lock()
234 int assert = (1 << (drp[reg].size * BITS_PER_BYTE)) - 1; in litex_clk_assert_reg()
251 timeout = ldev->timeout.lock; in litex_clk_wait()
253 timeout = ldev->timeout.drdy; in litex_clk_wait()
257 timeout--; in litex_clk_wait()
261 LOG_WRN("Timeout occured when waiting for the register: 0x%x", reg); in litex_clk_wait()
262 return -ETIME; in litex_clk_wait()
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/Zephyr-latest/drivers/flash/
Dflash_andes_qspi.c4 * SPDX-License-Identifier: Apache-2.0
93 const struct flash_andes_qspi_data *dev_data = dev->data; in dev_erase_types()
95 return dev_data->erase_types; in dev_erase_types()
102 const struct flash_andes_qspi_data *dev_data = dev->data; in dev_flash_size()
104 return dev_data->flash_size; in dev_flash_size()
106 const struct flash_andes_qspi_config *config = dev->config; in dev_flash_size()
108 return config->flash_size; in dev_flash_size()
115 const struct flash_andes_qspi_data *dev_data = dev->data; in dev_page_size()
117 return dev_data->page_size; in dev_page_size()
135 struct flash_andes_qspi_data *dev_data = dev->data; in flash_andes_qspi_access()
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Dflash_stm32_qspi.c6 * SPDX-License-Identifier: Apache-2.0
58 /* In dual-flash mode, total size is twice the size of one flash component */
125 * If set addressed operations should use 32-bit rather than
126 * 24-bit addresses.
138 struct flash_stm32_qspi_data *dev_data = dev->data; in qspi_lock_thread()
140 k_sem_take(&dev_data->sem, K_FOREVER); in qspi_lock_thread()
145 struct flash_stm32_qspi_data *dev_data = dev->data; in qspi_unlock_thread()
147 k_sem_give(&dev_data->sem); in qspi_unlock_thread()
153 struct flash_stm32_qspi_data *dev_data = dev->data; in qspi_set_address_size()
155 if (dev_data->flag_access_32bit) { in qspi_set_address_size()
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Dflash_stm32_xspi.c4 * SPDX-License-Identifier: Apache-2.0
23 #include <zephyr/dt-bindings/flash_controller/xspi.h>
59 struct flash_stm32_xspi_data *dev_data = dev->data; in xspi_lock_thread()
61 k_sem_take(&dev_data->sem, K_FOREVER); in xspi_lock_thread()
66 struct flash_stm32_xspi_data *dev_data = dev->data; in xspi_unlock_thread()
68 k_sem_give(&dev_data->sem); in xspi_unlock_thread()
73 struct flash_stm32_xspi_data *dev_data = dev->data; in xspi_send_cmd()
76 LOG_DBG("Instruction 0x%x", cmd->Instruction); in xspi_send_cmd()
78 dev_data->cmd_status = 0; in xspi_send_cmd()
80 hal_ret = HAL_XSPI_Command(&dev_data->hxspi, cmd, HAL_XSPI_TIMEOUT_DEFAULT_VALUE); in xspi_send_cmd()
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Dspi_nor.c2 * Copyright (c) 2018 Savoir-Faire Linux.
8 * SPDX-License-Identifier: Apache-2.0
36 * * Some devices support a Deep Power-Down mode which reduces current
41 * * PM_DEVICE_STATE_SUSPENDED corresponds to deep-power-down mode;
63 #define DEV_CFG(_dev_) ((const struct spi_nor_config * const) (_dev_)->config)
66 /* MXICY Low-power/high perf mode is second bit in configuration register 2 */
72 /* Build-time data associated with the device. */
92 /* Expected JEDEC ID, from jedec-id property */
96 /* Optional support for entering 32-bit address mode. */
101 /* Length of BFP structure, in 32-bit words. */
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Dflash_stm32_ospi.c5 * SPDX-License-Identifier: Apache-2.0
20 #include <zephyr/dt-bindings/flash_controller/ospi.h>
187 struct flash_stm32_ospi_data *dev_data = dev->data; in ospi_lock_thread()
189 k_sem_take(&dev_data->sem, K_FOREVER); in ospi_lock_thread()
194 struct flash_stm32_ospi_data *dev_data = dev->data; in ospi_unlock_thread()
196 k_sem_give(&dev_data->sem); in ospi_unlock_thread()
201 const struct flash_stm32_ospi_config *dev_cfg = dev->config; in ospi_send_cmd()
202 struct flash_stm32_ospi_data *dev_data = dev->data; in ospi_send_cmd()
205 LOG_DBG("Instruction 0x%x", cmd->Instruction); in ospi_send_cmd()
207 dev_data->cmd_status = 0; in ospi_send_cmd()
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/Zephyr-latest/drivers/watchdog/
Dwdt_nxp_fs26.c4 * SPDX-License-Identifier: Apache-2.0
30 #define WD_ERR_LIMIT(x) _CONCAT(WD_ERR_LIMIT_, x) argument
31 #define WD_RFR_LIMIT(x) _CONCAT(WD_RFR_LIMIT_, x) argument
32 #define WDW_PERIOD(x) _CONCAT(_CONCAT(WDW_PERIOD_, x), MS) argument
34 #define BAD_WD_REFRESH_ERROR_STRING(x) \ argument
35 ((((x) & BAD_WD_DATA) ? "error in the data" : \
36 (((x) & BAD_WD_TIMING) ? "error in the timing (window)" \
56 uint8_t raw; member
141 for (i = size; i > 0; i--) { in fs26_calcrc()
176 tx_buf = (uint32_t)(FS26_SET_REG_ADDR(tx_frame->addr) in fs26_spi_transceive()
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/Zephyr-latest/drivers/i2c/
Di2c_dw.c1 /* dw_i2c.c - I2C file for Design Ware */
5 * Copyright (c) 2022 Andrei-Edward Popa
7 * SPDX-License-Identifier: Apache-2.0
49 #include "i2c-priv.h"
76 const struct i2c_dw_rom_config *const rom = dev->config; in cb_i2c_idma_transfer()
77 struct i2c_dw_dev_config *const dw = dev->data; in cb_i2c_idma_transfer()
79 dma_stop(rom->dma_dev, channel); in cb_i2c_idma_transfer()
83 dw->xfr_status = true; in cb_i2c_idma_transfer()
85 dw->xfr_status = false; in cb_i2c_idma_transfer()
94 write_rdlr(fifo_depth - 1, reg_base); in i2c_dw_set_fifo_th()
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/Zephyr-latest/samples/bluetooth/hci_uart_async/src/
Dhci_uart_async.c2 * SPDX-License-Identifier: Apache-2.0
44 /** Send raw data on c2h UART.
46 * Blocks until completion. Not thread-safe.
49 * @retval -EBUSY Another transmission is in progress. This a
50 * thread-safety violation.
51 * @retval -errno @ref uart_tx error.
80 return ((const struct bt_hci_cmd_hdr *)hdr_buf)->param_len; in hci_payload_size()
82 return sys_le16_to_cpu(((const struct bt_hci_acl_hdr *)hdr_buf)->len); in hci_payload_size()
85 sys_le16_to_cpu(((const struct bt_hci_iso_hdr *)hdr_buf)->len)); in hci_payload_size()
107 /** Send raw data on c2h UART.
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/Zephyr-latest/drivers/misc/coresight/
Dnrf_etr.c4 * SPDX-License-Identifier: Apache-2.0
52 fmt = "D%s\t%02x "; \
55 fmt = "D%s\t%04x "; \
58 fmt = "D%s\t%08x "; \
61 fmt = "D%s\t%016x "; \
71 static const uint32_t wsize_mask = DT_REG_SIZE(ETR_BUFFER_NODE) / sizeof(int) - 1;
72 static const uint32_t wsize_inc = DT_REG_SIZE(ETR_BUFFER_NODE) / sizeof(int) - 1;
184 uint64_t ts = packet->timestamp; in log_message_process()
185 uint8_t level = packet->hdr.level; in log_message_process()
186 uint16_t plen = packet->hdr.package_len; in log_message_process()
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/Zephyr-latest/drivers/sensor/adi/adxl367/
Dadxl367.c4 * SPDX-License-Identifier: Apache-2.0
29 * @param dev - The device structure.
30 * @param th - Structure holding the activity threshold information:
39 struct adxl367_data *data = dev->data; in adxl367_setup_activity_detection()
43 ret = data->hw_tf->write_reg_mask(dev, ADXL367_ACT_INACT_CTL, in adxl367_setup_activity_detection()
46 FIELD_PREP(ADXL367_ACT_INACT_CTL_ACT_EN_MSK, th->enable) | in adxl367_setup_activity_detection()
48 th->referenced)); in adxl367_setup_activity_detection()
53 ret = data->hw_tf->write_reg_mask(dev, ADXL367_THRESH_ACT_H, ADXL367_THRESH_H_MSK, in adxl367_setup_activity_detection()
54 FIELD_PREP(ADXL367_THRESH_H_MSK, th->value >> 6)); in adxl367_setup_activity_detection()
59 return data->hw_tf->write_reg_mask(dev, ADXL367_THRESH_ACT_L, ADXL367_THRESH_L_MSK, in adxl367_setup_activity_detection()
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/Zephyr-latest/drivers/wifi/nrf_wifi/src/
Dwifi_mgmt_scan.c4 * SPDX-License-Identifier: Apache-2.0
9 * Zephyr OS layer of the Wi-Fi driver.
53 int ret = -1; in nrf_wifi_disp_scan_zep()
55 vif_ctx_zep = dev->data; in nrf_wifi_disp_scan_zep()
62 if (vif_ctx_zep->if_op_state != NRF_WIFI_FMAC_IF_OP_STATE_UP) { in nrf_wifi_disp_scan_zep()
67 rpu_ctx_zep = vif_ctx_zep->rpu_ctx_zep; in nrf_wifi_disp_scan_zep()
73 k_mutex_lock(&vif_ctx_zep->vif_lock, K_FOREVER); in nrf_wifi_disp_scan_zep()
74 if (!rpu_ctx_zep->rpu_ctx) { in nrf_wifi_disp_scan_zep()
79 fmac_dev_ctx = rpu_ctx_zep->rpu_ctx; in nrf_wifi_disp_scan_zep()
82 if (vif_ctx_zep->scan_in_progress) { in nrf_wifi_disp_scan_zep()
[all …]
/Zephyr-latest/subsys/usb/device/
Dusb_device.c56 * the standard device requests in table 9-3 from the universal serial bus
144 /* Setup packet definition used to read raw data from USB line */
167 "bmRT 0x%02x, bR 0x%02x, wV 0x%04x, wI 0x%04x, wL 0x%04x", in usb_print_setup()
168 setup->bmRequestType, in usb_print_setup()
169 setup->bRequest, in usb_print_setup()
170 setup->wValue, in usb_print_setup()
171 setup->wIndex, in usb_print_setup()
172 setup->wLength); in usb_print_setup()
216 uint32_t type = setup->RequestType.type; in usb_handle_request()
251 usb_dev.data_buf_residue -= chunk; in usb_data_to_host()
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/Zephyr-latest/subsys/logging/
Dlog_output.c4 * SPDX-License-Identifier: Apache-2.0
63 * 7 Debug Debug-level messages
101 char x = (char)c; in out_func() local
103 out_ctx->func((uint8_t *)&x, 1, out_ctx->control_block->ctx); in out_func()
107 if (out_ctx->control_block->offset == out_ctx->size) { in out_func()
111 idx = atomic_inc(&out_ctx->control_block->offset); in out_func()
112 out_ctx->buf[idx] = (uint8_t)c; in out_func()
114 __ASSERT_NO_MSG(out_ctx->control_block->offset <= out_ctx->size); in out_func()
174 us = (1000 * (remainder * 1000U - (ms * freq))) / freq; in timestamp_print()
183 char time_str[sizeof("1970-01-01T00:00:00")]; in timestamp_print()
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