Home
last modified time | relevance | path

Searched full:r8a779f0 (Results 1 – 19 of 19) sorted by relevance

/Zephyr-latest/soc/renesas/rcar/rcar_gen4/
DKconfig.soc12 r8a779f0 r52
18 r8a779f0 a55
24 default "r8a779f0" if SOC_R8A779F0_R52 || SOC_R8A779F0_A55
/Zephyr-latest/dts/bindings/clock/
Drenesas,r8a779f0-cpg-mssr.yaml4 description: Renesas R8A779F0 SoC Clock Pulse Generator / Module Standby and Software Reset
6 compatible: "renesas,r8a779f0-cpg-mssr"
/Zephyr-latest/boards/renesas/rcar_spider_s4/
Dboard.yml6 - name: r8a779f0
Drcar_spider_s4_r8a779f0_r52.yaml1 identifier: rcar_spider_s4/r8a779f0/r52
Drcar_spider_s4_r8a779f0_a55.yaml1 identifier: rcar_spider_s4/r8a779f0/a55
Drcar_spider_s4_r8a779f0_r52-pinctrl.dtsi7 #include <dt-bindings/pinctrl/renesas/pinctrl-r8a779f0.h>
Drcar_spider_s4_r8a779f0_r52.dts9 #include <arm/renesas/rcar/gen4/r8a779f0.dtsi>
Drcar_spider_s4_r8a779f0_a55-pinctrl.dtsi7 #include <zephyr/dt-bindings/pinctrl/renesas/pinctrl-r8a779f0.h>
Drcar_spider_s4_r8a779f0_a55.dts10 #include <arm64/renesas/r8a779f0.dtsi>
/Zephyr-latest/soc/renesas/rcar/
Dsoc.yml13 - name: r8a779f0
/Zephyr-latest/dts/arm64/renesas/
Dr8a779f0.dtsi2 * Device Tree Source for the R-Car S4 (R8A779F0) SoC
14 compatible = "renesas,r8a779f0";
84 compatible = "renesas,r8a779f0-cpg-mssr";
/Zephyr-latest/snippets/xen_dom0/
Dsnippet.yml16 rcar_spider_s4/r8a779f0/a55:
/Zephyr-latest/boards/renesas/rcar_spider_s4/support/
Dopenocd.cfg6 set _CHIPNAME r8a779f0
/Zephyr-latest/include/zephyr/dt-bindings/clock/
Dr8a779f0_cpg_mssr.h12 /* r8a779f0 CPG Core Clocks */
/Zephyr-latest/boards/renesas/rcar_spider_s4/doc/
Drcar_spider_a55.rst38 The Renesas ``rcar_spider_s4/r8a779f0/a55`` board configuration supports the following
70 :board: rcar_spider_s4/r8a779f0/a55
Drcar_spider_r52.rst144 Applications for the ``rcar_spider_s4/r8a779f0/r52`` board configuration can be built in the
149 :board: rcar_spider_s4/r8a779f0/r52
168 :board: rcar_spider_s4/r8a779f0/r52
/Zephyr-latest/dts/arm/renesas/rcar/gen4/
Dr8a779f0.dtsi29 compatible = "renesas,r8a779f0-cpg-mssr";
/Zephyr-latest/drivers/clock_control/
Dclock_control_r8a779f0_cpg_mssr.c5 * r8a779f0 Clock Pulse Generator / Module Standby and Software Reset
/Zephyr-latest/drivers/pinctrl/renesas/rcar/
Dpfc_r8a779f0.c10 #include <zephyr/dt-bindings/pinctrl/renesas/pinctrl-r8a779f0.h>