Home
last modified time | relevance | path

Searched +full:programming +full:- +full:enable (Results 1 – 25 of 197) sorted by relevance

12345678

/Zephyr-latest/dts/bindings/mtd/
Drenesas,ra-nv-flash.yaml2 # SPDX-License-Identifier: Apache-2.0
7 include: [base.yaml, soc-nv-flash.yaml]
9 compatible: "renesas,ra-nv-flash"
12 renesas,programming-enable:
14 description: Enable flash programming configuration
/Zephyr-latest/dts/arm/renesas/ra/ra8/
Dr7fa8m1ahecbd.dtsi4 * SPDX-License-Identifier: Apache-2.0
11 flash-controller@40100000 {
13 compatible = "renesas,ra-nv-flash";
15 write-block-size = <128>;
16 erase-block-size = <8192>;
17 renesas,programming-enable;
21 compatible = "renesas,ra-nv-flash";
23 write-block-size = <4>;
24 erase-block-size = <64>;
25 renesas,programming-enable;
Dr7fa8t1ahecbd.dtsi4 * SPDX-License-Identifier: Apache-2.0
11 flash-controller@40100000 {
13 compatible = "renesas,ra-nv-flash";
15 write-block-size = <128>;
16 erase-block-size = <8192>;
17 renesas,programming-enable;
21 compatible = "renesas,ra-nv-flash";
23 write-block-size = <4>;
24 erase-block-size = <64>;
25 renesas,programming-enable;
Dr7fa8d1bhecbd.dtsi4 * SPDX-License-Identifier: Apache-2.0
8 #include <zephyr/dt-bindings/mipi_dsi/mipi_dsi.h>
12 flash-controller@40100000 {
14 compatible = "renesas,ra-nv-flash";
16 write-block-size = <128>;
17 erase-block-size = <8192>;
18 renesas,programming-enable;
22 compatible = "renesas,ra-nv-flash";
24 write-block-size = <4>;
25 erase-block-size = <64>;
[all …]
/Zephyr-latest/drivers/eeprom/
DKconfig4 # SPDX-License-Identifier: Apache-2.0
7 bool "Electrically Erasable Programmable Read-Only Memory (EEPROM) drivers"
9 Enable support for EEPROM hardware.
14 module-str = eeprom
29 Enable the EEPROM shell with EEPROM related commands.
42 Enable support for Atmel AT2x (and compatible) I2C/SPI
49 This is an emulator for the Atmel AT24 series of I2C-attached EEPROMs.
51 At present it only supports 8-bit addressing. The size of the EEPROM
61 Enable support for I2C EEPROMs compatible with Atmel's AT24 family.
64 the programming model of the Atmel AT24.
[all …]
/Zephyr-latest/drivers/dai/intel/alh/
DKconfig.alh4 # SPDX-License-Identifier: Apache-2.0
12 Select this to enable Intel ALH driver.
23 Select this to enable programming HW ownership
/Zephyr-latest/soc/espressif/common/
DKconfig.flash2 # SPDX-License-Identifier: Apache-2.0
18 Enable this to support auto detection of ISSI chips if chip vendor not directly
26 Enable this to support auto detection of MXIC chips if chip vendor not directly
34 Enable this to support auto detection of GD (GigaDevice) chips if chip vendor not
36 modules, please don't disable this, otherwise your flash may not work in 4-bit
47 Enable this to support auto detection of Winbond chips if chip vendor not directly
55 Enable this to support auto detection of BOYA chips if chip vendor not directly
63 Enable this to support auto detection of TH chips if chip vendor not directly
72 Enable this to support auto detection of Octal MXIC chips if chip vendor not directly
80 Enable this flag to use patched versions of SPI flash ROM driver functions.
[all …]
/Zephyr-latest/drivers/flash/
Dflash_stm32f1x.c6 * SPDX-License-Identifier: Apache-2.0
35 #define FLASH_ERASED_VALUE ((flash_prg_t)-1)
50 return !!(regs->CR & FLASH_CR_LOCK); in is_flash_locked()
55 regs->CR |= FLASH_CR_PG; in write_enable()
60 regs->CR &= (~FLASH_CR_PG); in write_disable()
66 regs->CR |= FLASH_CR_PER; in erase_page_begin()
67 regs->AR = FLASH_STM32_BASE_ADDRESS + page * FLASH_PAGE_SIZE; in erase_page_begin()
72 regs->CR |= FLASH_CR_STRT; in erase_page_begin()
77 regs->CR &= ~FLASH_CR_PER; in erase_page_end()
84 return !!(regs->PECR & FLASH_PECR_PRGLOCK); in is_flash_locked()
[all …]
DKconfig4 # SPDX-License-Identifier: Apache-2.0
23 Device does not do erase-on-write (erase-on-program, auto-erase
26 some other value, as program can only change bits from erased-value
29 been separated from write, EEPROM has erase-on-write, giving
31 Note that explicit-erase capability does not warrants that
42 optimized-out by compiler in case where there is no such device in
48 Device does not require explicit erase before programming
51 Note that the device may have erase-on-write (auto-erase),
62 such devices, and could be optimized-out by compiler in
79 Selected by drivers that support JESD216-compatible flash
[all …]
/Zephyr-latest/drivers/fpga/
Dfpga_eos_s3.c4 * SPDX-License-Identifier: Apache-2.0
15 CRU->C16_CLK_GATE = C16_CLK_GATE_PATH_0_ON; in eos_s3_fpga_enable_clk()
16 CRU->C21_CLK_GATE = C21_CLK_GATE_PATH_0_ON; in eos_s3_fpga_enable_clk()
17 CRU->C09_CLK_GATE = C09_CLK_GATE_PATH_1_ON | C09_CLK_GATE_PATH_2_ON; in eos_s3_fpga_enable_clk()
18 CRU->C02_CLK_GATE = C02_CLK_GATE_PATH_1_ON; in eos_s3_fpga_enable_clk()
23 CRU->C16_CLK_GATE = C16_CLK_GATE_PATH_0_OFF; in eos_s3_fpga_disable_clk()
24 CRU->C21_CLK_GATE = C21_CLK_GATE_PATH_0_OFF; in eos_s3_fpga_disable_clk()
25 CRU->C09_CLK_GATE = C09_CLK_GATE_PATH_1_OFF | C09_CLK_GATE_PATH_2_OFF; in eos_s3_fpga_disable_clk()
26 CRU->C02_CLK_GATE = C02_CLK_GATE_PATH_1_OFF; in eos_s3_fpga_disable_clk()
37 if (PMU->FB_STATUS == FPGA_STATUS_ACTIVE) { in eos_s3_fpga_get_status()
[all …]
/Zephyr-latest/arch/arm64/core/cortex_r/
DKconfig6 # SPDX-License-Identifier: Apache-2.0
21 The ARMv8-R MPU architecture requires a power-of-two alignment
24 The ARMv8-R MPU requires the active MPU regions be non-overlapping.
25 As a result of this, the ARMv8-R MPU needs to fully partition the
26 memory map when programming dynamic memory regions (e.g. PRIV stack
29 of the ARMv8-R background memory map. The application developer may
33 SRAM area covered only by the default ARMv8-R memory map. This
41 of full partitioning the default behavior for the ARMv8-R MPU
51 A minimum 4-byte alignment is enforced in ARM builds without
59 Enable this to allow MPU RWX access to flash memory
/Zephyr-latest/arch/arm/core/mpu/
DKconfig4 # SPDX-License-Identifier: Apache-2.0
23 The ARMv6-M and ARMv7-M MPU architecture requires a power-of-two
26 The NXP MPU as well as the ARMv8-M MPU do not require MPU regions
27 to have power-of-two alignment for base address and region size.
29 The ARMv8-M MPU requires the active MPU regions be non-overlapping.
30 As a result of this, the ARMv8-M MPU needs to fully partition the
31 memory map when programming dynamic memory regions (e.g. PRIV stack
34 of the ARMv8-M background memory map. The application developer may
38 SRAM area covered only by the default ARMv8-M memory map. This
46 of full partitioning the default behavior for the ARMv8-M MPU
[all …]
/Zephyr-latest/boards/norik/octopus_io_board/doc/
Dindex.rst6 Octopus IO-Board is an expansion to the Octopus SoM, which is built around the nRF9160 SiP
7 offering NB-IoT and LTE-M connectivity, GPS and accelerometer. Octopus IO-Board expands
9 development and prototyping of low-power IoT applications.
11 nRF9160 SiP contains ARM Cortex-M33 application processor and the
18 * :abbr:`I2C (Inter-Integrated Circuit)`
25 * :abbr:`UARTE (Universal asynchronous receiver-transmitter with EasyDMA)`
29 Octopus IO-Board offers the following features:
32 * USB-C for power
41 * Tag-Connect TC2030-IDC 6-pin connector for SWD programming and debugging
42 * 2x3 pinheader for SWD programming and debugging
[all …]
/Zephyr-latest/boards/cypress/cy8ckit_062_ble/doc/
Dindex.rst9 The PSOC 6 BLE Pioneer Kit (CY8CKIT-062-BLE) is a hardware platform that
12 The PSOC 6 BLE Pioneer Kit features the PSOC 63 MCU: a dual-core MCU, with a
13 150-MHz Arm Cortex-M4 as the primary application processor and a 100-MHz Arm
14 Cortex-M0+ that supports low-power operations, 1MB of Flash, 288KB of SRAM,
16 programmable digital blocks, and capacitive-sensing with CapSense.
19 512-Mb NOR flash, onboard programmer/debugger (KitProg2), USB Type-C power
20 delivery system (EZ-PD™ CCG3), 5-segment CapSense slider, two CapSense
24 The CY8CKIT-062-BLE package includes a CY8CKIT-028-EPD E-INK Display Shield
25 that contains a 2.7-inch E-INK display, a motion sensor, a thermistor, and a
27 Dongle that is factory-programmed to emulate a BLE GAP Central device,
[all …]
/Zephyr-latest/boards/intel/ehl/doc/
Dindex.rst30 Programming and Debugging
45 .. zephyr-app-commands::
46 :zephyr-app: samples/hello_world
59 :start-after: start_include_here
65 :start-after: start_include_here
68 To enable PXE boot for Elkhart Lake CRB board do the following:
70 #. Enable boot from PXE. Go to EFI shell and make sure that the first boot
73 .. code-block:: console
77 Desc - UEFI PXEv4 (MAC:6805CABC1997)
78 DevPath - PciRoot(0x0)/Pci(0x1C,0x0)/Pci(0x0,0x0)/MAC(6805CABC1997,0x0)/IPv4(0.0.0.0)
[all …]
/Zephyr-latest/boards/silabs/dev_kits/xg27_dk2602a/doc/
Dindex.rst3 Silicon Labs xG27-DK2602A is a Dev Kit using the EFR32BG27 SoC. The kit
9 - EFR32BG27 Blue Gecko Wireless SoC with up to 76.8 MHz operating frequency
10 - ARM® Cortex® M33 core with 64 kB RAM and 768 kB Flash
11 - Macronix ultra low power 8-Mbit SPI flash (MX25R8035F)
12 - 2.4 GHz ceramic antenna for wireless transmission
13 - Silicon Labs Si7021 relative humidity and temperature sensor
14 - Vishay VEML6035 low power, high sensitivity ambient light Sensor
15 - Silicon Labs Si7210 hall effect sensor
16 - TDK InvenSense ICM-20689 6-axis inertial sensor
17 - Pair of PDM microphones
[all …]
/Zephyr-latest/boards/gd/gd32a503v_eval/doc/
Dindex.rst6 The GD32A503V-EVAL board is a hardware platform that enables design and debug
7 of the GigaDevice A503 Cortex-M4F High Performance MCU.
9 The GD32A503VD features a single-core ARM Cortex-M4F MCU which can run up
10 to 120-MHz with flash accesses zero wait states, 384kiB of Flash, 48kiB of
16 - 2 user LEDs
17 - 2 user push buttons
18 - Reset Button
19 - ADC connected to a potentiometer
20 - 1 DAC channels
21 - GD25Q16 2Mib SPI Flash
[all …]
/Zephyr-latest/boards/up-bridge-the-gap/up_squared/doc/
Dindex.rst18 Up Squared (Credit: https://up-board.org)
35 ----
39 connected to the on-board FPGA acting as level shifter. Therefore,
53 Programming and Debugging
69 .. zephyr-app-commands::
70 :zephyr-app: samples/hello_world
83 :start-after: start_include_here
87 <https://wiki.up-community.org/Serial_console>`_ for instructions on how to
93 .. code-block:: console
101 :start-after: start_include_here
[all …]
/Zephyr-latest/boards/kincony/kincony_kc868_a32/doc/
Dindex.rst6 Kincony KC868-A32 is a home automation relay module based on the
7 Espressif ESP-WROOM-32 module with all its inherent capabilities
8 (Wi-Fi, Bluetooth, etc.)
12 - 32 digital optoisolated inputs “dry contact”
13 - 4 analog inputs 0-5 V
14 - 32 relays 220 V, 10 A (COM, NO, NC)
15 - RS485 interface
16 - I2C connector
17 - Connector GSM/HMI
18 - Ethernet LAN8270A
[all …]
/Zephyr-latest/samples/boards/nxp/mimxrt595_evk/system_off/
DREADME.rst1 .. zephyr:code-sample:: mimxrt595_evk_system_off
3 :relevant-api: sys_poweroff
5 Use soft-off on MIMXRT595-EVK.
13 * Busy-wait for 2 seconds
20 This application uses MIMXRT595-EVK for the demo.
25 .. zephyr-app-commands::
26 :zephyr-app: samples/boards/nxp/mimxrt595_evk/system_off
41 MIMXRT595-EVK core output
42 --------------------------
44 .. code-block:: console
[all …]
/Zephyr-latest/arch/arm/core/cortex_m/
Disr_wrapper.c2 * Copyright (c) 2013-2014 Wind River Systems, Inc.
6 * SPDX-License-Identifier: Apache-2.0
11 * @brief ARM Cortex-M wrapper for ISRs with parameter
42 * idle, this ensures that the calculation and programming of the in _isr_wrapper()
44 * non-tickless idle, this ensures that the clearing of the kernel idle in _isr_wrapper()
51 * is only necessary for the Cortex-M because it is the only ARM in _isr_wrapper()
64 /* re-enable interrupts */ in _isr_wrapper()
74 irq_number -= 16; in _isr_wrapper()
77 (entry->isr)(entry->arg); in _isr_wrapper()
/Zephyr-latest/boards/gd/gd32e103v_eval/doc/
Dindex.rst6 The GD32E103V-EVAL board is a hardware platform that enables design and debug
7 of the GigaDevice E103 Cortex-M4F High Performance MCU.
9 The GD32E103VB features a single-core ARM Cortex-M4F MCU which can run up
10 to 120-MHz with flash accesses zero wait states, 128kiB of Flash, 32kiB of
16 - USB interface with mini-USB connector
17 - 4 user LEDs
18 - 4 user push buttons
19 - Reset Button
20 - ADC connected to a potentiometer
21 - 2 DAC channels
[all …]
/Zephyr-latest/boards/ezurio/mg100/doc/
Dindex.rst10 (LTE-M/NB-IoT) connection. The MG100 seamlessly incorporates a powerful Cortex M4F controller,
11 full Bluetooth 5 connectivity, and dual-mode LTE-M/NB-IoT capabilities. The MG100 has full regulato…
24 The MG100 hardware provides support for the Nordic Semiconductor `nRF52840`_ ARM Cortex-M4F CPU,
32 * :abbr:`I2C (Inter-Integrated Circuit)`
39 * :abbr:`UART (Universal asynchronous receiver-transmitter)`
42 * :abbr:`LIS3DH (ST Micro 3-axis MEMS accelerometer)`
43 * :abbr:`HL7800 (Sierra Wireless HL7800 LTE-M1/NB-IoT modem)`
55 +-----------+------------+----------------------+
58 | ADC | on-chip | adc |
59 +-----------+------------+----------------------+
[all …]
/Zephyr-latest/boards/intel/rpl/doc/
Dindex.rst8 Raptor Lake processor is a 13th generation 64-bit multi-core processor built
9 on a 10-nanometer technology process. Raptor Lake is based on a Hybrid
10 architecture, utilizing P-cores for performance and E-Cores for efficiency.
14 The S-Processor line is a 2-Chip Platform that includes the Processor Die and
15 Platform Controller Hub (PCH-S) Die in the Package.
17 The P-Processor line is a 2-Die Multi Chip Package (MCP) that includes the
18 Processor Die and Platform Controller Hub (PCH-P) Die on the same package as
21 For more information about Raptor Lake Processor lines, P-cores, and E-cores
28 These board configurations enable kernel support for the supported Raptor Lake
44 Programming and Debugging
[all …]
/Zephyr-latest/boards/shields/g1120b0mipi/doc/
Dindex.rst10 1-lane MIPI interface. This display connects to the i.MX RT595 Evaluation Kit.
22 +-----------------------+------------------------+
26 +-----------------------+------------------------+
28 +-----------------------+------------------------+
30 +-----------------------+------------------------+
32 +-----------------------+------------------------+
34 +-----------------------+------------------------+
36 +-----------------------+------------------------+
38 +-----------------------+------------------------+
39 | 32 | LCD power enable |
[all …]

12345678