| /Zephyr-Core-3.6.0/dts/bindings/pinctrl/ |
| D | infineon,cat1-pinctrl.yaml | 4 # SPDX-License-Identifier: Apache-2.0
11 UART0 RX to a particular port/pin and enable the pull-up resistor on that
22 'bias-pull-up' property. Here is a list of the supported standard pin
24 * bias-high-impedance
25 * bias-pull-up
26 * bias-pull-down
27 * drive-open-drain
28 * drive-open-source
29 * drive-push-pull (strong)
30 * input-enable (input-buffer)
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| D | infineon,xmc4xxx-pinctrl.yaml | 2 # SPDX-License-Identifier: Apache-2.0
12 compatible = "infineon,xmc4xxx-uart";
13 pinctrl-0 = <&uart_tx_p0_1_u1c1 &uart_rx_p0_0_u1c1>;
14 pinctrl-names = "default";
15 input-src = "DX0D";
19 pinctrl-0 is the phandle that stores the pin settings for two pins: &uart_tx_p0_1_u1c1
20 and &uart_rx_p0_0_u1c1. These nodes are pre-defined and their naming convention is designed
24 The pre-defined nodes only set the alternate function of the output pin. The
26 The set of possible configurations are defined in the properties section below (in addition
27 to the inherited property-allowlist list from pincfg-node.yaml).
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| D | gd,gd32-pinctrl-common.yaml | 2 # SPDX-License-Identifier: Apache-2.0
6 child-binding:
7 child-binding:
9 - name: pincfg-node.yaml
10 property-allowlist:
11 - drive-push-pull
12 - drive-open-drain
13 - bias-disable
14 - bias-pull-down
15 - bias-pull-up
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| D | espressif,esp32-pinctrl.yaml | 2 # SPDX-License-Identifier: Apache-2.0
6 functionalities and pin properties as defined by pin states. In its turn, pin
7 states are composed by groups of pre-defined pin muxing definitions and user
10 Each Zephyr-based application has its own set of pin muxing/pin configuration
11 requirements. The next steps use ESP-WROVER-KIT's I2C_0 to illustrate how one
15 Suppose an application running on top of the ESP-WROVER-KIT board, for some
18 you'll notice that the I2C_0 node is already assigned to a pre-defined state.
22 #include "esp_wrover_kit-pinctrl.dtsi"
26 pinctrl-0 = <&i2c0_default>;
27 pinctrl-names = "default";
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| D | ti,cc32xx-pinctrl.yaml | 2 # SPDX-License-Identifier: Apache-2.0
7 use this node to route UART0 RX to pin 55 and enable the pull-up resistor
20 /* You can put this in places like a board-pinctrl.dtsi file in
24 /* include pre-defined combinations for the SoC variant used by the board */
25 #include <dt-bindings/pinctrl/gd32f450i(g-i-k)xx-pinctrl.h>
39 /* both pin 57 and 62 have pull-up enabled */
40 bias-pull-up;
53 pins, such as the 'bias-pull-up' property in group 2. Here is a list of
56 - drive-push-pull: Push-pull drive mode (default, not required).
57 - drive-open-drain: Open-drain drive mode.
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| D | atmel,sam-pinctrl.yaml | 3 # Copyright (c) 2021-2022, Gerson Fernando Budke <nandojve@gmail.com>
4 # SPDX-License-Identifier: Apache-2.0
11 to route USART0 RX to pin PA10 and enable the pull-up resistor on the pin.
23 /** You can put this in places like a <board>-pinctrl.dtsi file in
27 /** include pre-defined combinations for the SoC variant used by the board */
28 #include <dt-bindings/pinctrl/sam4sXc-pinctrl.h>
42 /* both PA5 and PA7 have pull-up enabled */
43 bias-pull-up;
57 pins, such as the 'bias-pull-up' property in group 2. Here is a list of
60 - bias-pull-up: Enable pull-up resistor.
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| D | atmel,sam0-pinctrl.yaml | 2 # Copyright (c) 2021-2022, Gerson Fernando Budke
3 # SPDX-License-Identifier: Apache-2.0
10 to route SERCOM0 as UART were RX to pin PAD1 and enable the pull-up resistor
23 /** You can put this in places like a <board>-pinctrl.dtsi file in
27 /** include pre-defined combinations for the SoC variant used by the board */
28 #include <dt-bindings/pinctrl/samr21g-pinctrl.h>
42 /* both PA5 and PA7 have pull-up enabled */
43 bias-pull-up;
57 pins, such as the 'bias-pull-up' property in group 2. Here is a list of
60 - bias-pull-up: Enable pull-up resistor.
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| D | nuvoton,numaker-pinctrl.yaml | 2 # SPDX-License-Identifier: Apache-2.0
30 To link pin configurations with a device, use a pinctrl-N property for some
33 #include "board-pinctrl.dtsi"
36 pinctrl-0 = <&uart0_default>;
37 pinctrl-names = "default";
40 compatible: "nuvoton,numaker-pinctrl"
48 child-binding:
50 child-binding:
54 - name: pincfg-node.yaml
55 property-allowlist:
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| /Zephyr-Core-3.6.0/subsys/bluetooth/controller/ll_sw/nordic/hal/nrf5/radio/ |
| D | radio_nrf5_ppi_resources.h | 2 * Copyright (c) 2021-2024 Nordic Semiconductor ASA
4 * SPDX-License-Identifier: Apache-2.0
9 /* PPI channel 20 is pre-programmed with the following fixed settings:
10 * EEP: TIMER0->EVENTS_COMPARE[0]
11 * TEP: RADIO->TASKS_TXEN
14 /* PPI channel 21 is pre-programmed with the following fixed settings:
15 * EEP: TIMER0->EVENTS_COMPARE[0]
16 * TEP: RADIO->TASKS_RXEN
20 /* PPI channel 26 is pre-programmed with the following fixed settings:
21 * EEP: RADIO->EVENTS_ADDRESS
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| D | radio_nrf5_ppi.h | 2 * Copyright (c) 2018 - 2020 Nordic Semiconductor ASA
5 * SPDX-License-Identifier: Apache-2.0
22 * Use the pre-programmed PPI channels if possible (if TIMER0 is used as the
29 /* No need to configure anything for the pre-programmed channels. in hal_radio_enable_on_tick_ppi_config_and_enable()
48 (uint32_t)&(EVENT_TIMER->EVENTS_COMPARE[0]), in hal_radio_enable_on_tick_ppi_config_and_enable()
49 (uint32_t)&(NRF_RADIO->TASKS_TXEN)); in hal_radio_enable_on_tick_ppi_config_and_enable()
51 #if defined(CONFIG_BT_CTLR_SW_SWITCH_SINGLE_TIMER) in hal_radio_enable_on_tick_ppi_config_and_enable()
52 NRF_PPI->CHG[SW_SWITCH_SINGLE_TIMER_TASK_GROUP_IDX] = in hal_radio_enable_on_tick_ppi_config_and_enable()
57 (uint32_t)&(NRF_PPI->TASKS_CHG[SW_SWITCH_SINGLE_TIMER_TASK_GROUP_IDX].DIS)); in hal_radio_enable_on_tick_ppi_config_and_enable()
65 (uint32_t)&(EVENT_TIMER->EVENTS_COMPARE[0]), in hal_radio_enable_on_tick_ppi_config_and_enable()
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| /Zephyr-Core-3.6.0/dts/bindings/sensor/ |
| D | ite,it8xxx2-vcmp.yaml | 2 # SPDX-License-Identifier: Apache-2.0
6 compatible: "ite,it8xxx2-vcmp"
8 include: sensor-device.yaml
17 vcmp-ch:
22 scan-period:
27 Check include/zephyr/dt-bindings/sensor/it8xxx2_vcmp.h file for
28 pre-defined values.
36 Check include/zephyr/dt-bindings/sensor/it8xxx2_vcmp.h file for
37 pre-defined values.
39 threshold-mv:
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| /Zephyr-Core-3.6.0/subsys/testsuite/ztest/ |
| D | Kconfig | 2 # SPDX-License-Identifier: Apache-2.0
43 value. Please be aware that increasing it for long-running test cases
64 default -2 if !PREEMPT_ENABLED
65 default -1
67 Set priority of the testing thread. Default is -1 (cooperative).
87 bool "Using a pre-defined fatal handler and hook function"
89 Use the pre-defined common fatal error handler and a post hook to
95 bool "Using a pre-defined assert handler and hook function"
97 Use the pre-defined common assert fail handler and a post hook to
130 bool "Validates all defined tests have ran"
|
| /Zephyr-Core-3.6.0/modules/trusted-firmware-m/src/ |
| D | reboot.c | 4 * SPDX-License-Identifier: Apache-2.0
10 #if defined(TFM_PSA_API)
20 * The function requests Trusted-Firmware-M to reset the processor,
21 * on behalf of the Non-Secure application. The function overrides
24 * \pre The implementation requires the TFM_PARTITION_PLATFORM be defined.
27 #if defined(CONFIG_TFM_PARTITION_PLATFORM)
|
| /Zephyr-Core-3.6.0/include/zephyr/arch/arc/ |
| D | tool-compat.h | 5 * SPDX-License-Identifier: Apache-2.0
16 * __CCAC__ is a pre-defined macro of metaware compiler.
18 #if defined(__CCAC__)
|
| /Zephyr-Core-3.6.0/dts/bindings/fs/ |
| D | zephyr,fstab.yaml | 2 # SPDX-License-Identifier: Apache-2.0
5 Description of pre-defined file systems.
8 properties described in zephyr,fstab-common.yaml.
|
| /Zephyr-Core-3.6.0/dts/bindings/i2c/ |
| D | st,stm32-i2c-v2.yaml | 1 # Copyright (c) 2017 I-SENSE group of ICCS
2 # SPDX-License-Identifier: Apache-2.0
6 compatible: "st,stm32-i2c-v2"
8 include: [i2c-controller.yaml, pinctrl-device.yaml]
17 pinctrl-0:
20 pinctrl-names:
26 An optional table of pre-computed i2c timing values with the
29 Precise timings values for a given Hardware can be pre-computed
38 clock-frequency timing>
40 For example timings could be defined as
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| /Zephyr-Core-3.6.0/dts/bindings/tcpc/ |
| D | st,stm32-ucpd.yaml | 2 # SPDX-License-Identifier: Apache-2.0
5 ST STM32 family USB Type-C / Power Delivery. The default values were
6 taken from the LL_UCPD_StructInit function defined in the HAL.
8 compatible: "st,stm32-ucpd"
10 include: [base.yaml, pinctrl-device.yaml]
22 psc-ucpdclk:
26 - 1
27 - 2
28 - 4
29 - 8
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| /Zephyr-Core-3.6.0/doc/connectivity/usb/api/ |
| D | hid.rst | 6 Common USB HID part that can be used outside of USB support, defined in
22 The pre-defined Mouse and Keyboard report descriptors can be used by
|
| /Zephyr-Core-3.6.0/boards/arm/mec172xmodular_assy6930/ |
| D | CMakeLists.txt | 4 # SPDX-License-Identifier: Apache-2.0
9 #Allow users to pre-specify the tool using '-DMEC172X_SPI_GEN=<path-to-tool>/toolname'
10 if (NOT DEFINED MEC172X_SPI_GEN)
14 if(MEC172X_SPI_GEN STREQUAL MEC172X_SPI_GEN-NOTFOUND)
18 if (NOT DEFINED MEC172X_SPI_CFG)
22 if(MEC172X_SPI_CFG STREQUAL MEC172X_SPI_CFG-NOTFOUND)
26 …f (NOT MEC172X_SPI_GEN STREQUAL MEC172X_SPI_GEN-NOTFOUND AND NOT MEC172X_SPI_CFG STREQUAL MEC172X_…
29 -i ${MEC172X_SPI_CFG}
30 -o ${PROJECT_BINARY_DIR}/${SPI_IMAGE_NAME}
|
| /Zephyr-Core-3.6.0/boards/common/ |
| D | openocd-nrf5.board.cmake | 1 # SPDX-License-Identifier: Apache-2.0
9 if (NOT DEFINED OPENOCD_NRF5_SUBFAMILY)
18 if (NOT DEFINED OPENOCD_NRF5_INTERFACE)
33 board_runner_args(openocd --cmd-pre-init "${cmd}")
|
| /Zephyr-Core-3.6.0/subsys/fs/ |
| D | Kconfig.fatfs | 4 # SPDX-License-Identifier: Apache-2.0
19 bool "Read-only support for all volumes"
22 Select this when using FAT for read-only access to slightly
24 This option affects FF_FS_READONLY defined in ffconf.h, inside
31 This option affects FF_USE_MKFS defined in ffconf.h, inside
76 FIL is defined in ff.h of ELM FAT driver, and is pre-allocated
77 at compile-time.
86 DIR is defined in ff.h of ELM FAT driver, and is pre-allocated
87 at compile-time.
105 Enable LFN with static working buffer on the BSS. Always NOT thread-safe.
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| /Zephyr-Core-3.6.0/scripts/native_simulator/common/src/ |
| D | nsi_tasks.h | 4 * SPDX-License-Identifier: Apache-2.0
57 /* Let's cross-check the macro level is a valid one, so we don't silently drop it */ \
59 "Using a non pre-defined level, it will be dropped")
64 * @param level One of NSITASK_*_LEVEL as defined in soc.h
|
| /Zephyr-Core-3.6.0/arch/arm/core/cortex_m/ |
| D | swap_helper.S | 2 * Copyright (c) 2013-2014 Wind River Systems, Inc.
3 * Copyright (c) 2017-2019 Nordic Semiconductor ASA.
6 * SPDX-License-Identifier: Apache-2.0
11 * @brief Thread context switching for ARM Cortex-M
14 * on ARM Cortex-M CPUs.
30 #if defined(CONFIG_USERSPACE)
36 #if defined(CONFIG_THREAD_LOCAL_STORAGE)
52 * For Cortex-M, z_arm_pendsv() is invoked with no arguments.
61 #if defined(CONFIG_ARMV6_M_ARMV8_M_BASELINE)
73 #if defined(CONFIG_ARM_STORE_EXC_RETURN)
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| /Zephyr-Core-3.6.0/soc/posix/inf_clock/ |
| D | posix_native_task.h | 4 * SPDX-License-Identifier: Apache-2.0
38 * Note that for the PRE and ON_EXIT levels neither the Zephyr kernel or
56 * @param level One of _NATIVE_*_LEVEL as defined in soc.h
|
| /Zephyr-Core-3.6.0/arch/arc/core/ |
| D | thread.c | 4 * SPDX-License-Identifier: Apache-2.0
22 #if defined(CONFIG_ARC_DSP) && defined(CONFIG_DSP_SHARING)
47 return (thread->base.user_options & K_USER) != 0; in is_user()
51 /* Set all stack-related architecture variables for the provided thread */
57 thread->arch.priv_stack_start = in setup_stack_vars()
58 (uint32_t)z_priv_stack_find(thread->stack_obj); in setup_stack_vars()
60 thread->arch.priv_stack_start = (uint32_t)(thread->stack_obj); in setup_stack_vars()
62 thread->arch.priv_stack_start += Z_ARC_STACK_GUARD_SIZE; in setup_stack_vars()
64 thread->arch.priv_stack_start = 0; in setup_stack_vars()
71 thread->arch.k_stack_top = thread->arch.priv_stack_start; in setup_stack_vars()
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